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From: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
To: Stephen Boyd <sboyd@kernel.org>,
	Brian Masney <bmasney+clk@redhat.com>,
	Jerome Brunet <jbrunet+clk@baylibre.com>,
	Maxime Coquelin <mcoquelin.stm32@gmail.com>,
	Alexandre Torgue <alexandre.torgue@foss.st.com>,
	Philipp Zabel <p.zabel@pengutronix.de>
Cc: <linux-clk@vger.kernel.org>,
	<linux-stm32@st-md-mailman.stormreply.com>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>,
	Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Subject: [PATCH v2] clk: stm32: add support for reset_control_reset()
Date: Mon, 19 Oct 2026 14:13:58 +0200	[thread overview]
Message-ID: <20261019-ups_reset_control_reset-v2-1-be4ccf511cbb@foss.st.com> (raw)

The STM32 RCC reset controller currently implements only .assert(),
.deassert(), and .status().

As a result, reset_control_reset() returns -ENOTSUPP, forcing consumers
to open-code the assert / delay / deassert sequence.
rs.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
---
Changes in v2:
- Increase the assert delay from 2 us to 50 us, a value that suits all
  STM32 IPs
- Remove the polling of the reset status bit after deassertion and,
  therefore, the deassert timeout: .reset() now only asserts the reset,
  waits for the assert delay, and deasserts it.
  If polling after deassertion is needed, it will be addressed in a
  separate patch, as it affects all reset deassertions on STM32
  platforms.
 
- Link to v1: https://lore.kernel.org/r/20261013-ups_reset_control_reset-v1-1-f8a6c7f6cc3c@foss.st.com
---
 drivers/clk/stm32/reset-stm32.c | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/drivers/clk/stm32/reset-stm32.c b/drivers/clk/stm32/reset-stm32.c
index fc237fccae68..774d77d6de5c 100644
--- a/drivers/clk/stm32/reset-stm32.c
+++ b/drivers/clk/stm32/reset-stm32.c
@@ -4,6 +4,7 @@
  * Author: Gabriel Fernandez <gabriel.fernandez@foss.st.com> for STMicroelectronics.
  */
 
+#include <linux/delay.h>
 #include <linux/of.h>
 #include <linux/platform_device.h>
 #include <linux/regmap.h>
@@ -13,6 +14,12 @@
 
 #include "reset-stm32.h"
 
+/*
+ * Hold time between reset assertion and deassertion.
+ * This is a compromise value that suits all STM32 IPs.
+ */
+#define STM32_RESET_ASSERT_DELAY_US		50
+
 struct stm32_reset_data {
 	/* reset lock */
 	spinlock_t			lock;
@@ -119,9 +126,23 @@ static int stm32_reset_status(struct reset_controller_dev *rcdev,
 	return !!(reg & BIT(ptr_line->bit_idx));
 }
 
+static int stm32_reset(struct reset_controller_dev *rcdev, unsigned long id)
+{
+	int ret;
+
+	ret = stm32_reset_assert(rcdev, id);
+	if (ret)
+		return ret;
+
+	fsleep(STM32_RESET_ASSERT_DELAY_US);
+
+	return stm32_reset_deassert(rcdev, id);
+}
+
 static const struct reset_control_ops stm32_reset_ops = {
 	.assert		= stm32_reset_assert,
 	.deassert	= stm32_reset_deassert,
+	.reset		= stm32_reset,
 	.status		= stm32_reset_status,
 };
 

---
base-commit: a90ee4305c4a5df72c11b31dacfdc76e00fcf78a
change-id: 20261013-ups_reset_control_reset-4c2f1b08ddf1

Best regards,
-- 
Gabriel Fernandez <gabriel.fernandez@foss.st.com>


                 reply	other threads:[~2026-10-19 12:14 UTC|newest]

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