From: David Matlack <dmatlack@google.com>
To: kexec@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-mm@kvack.org, linux-pci@vger.kernel.org
Cc: "Adithya Jayachandran" <ajayachandra@nvidia.com>,
"Alexander Graf" <graf@amazon.com>,
"Alex Williamson" <alex@shazbot.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"David Matlack" <dmatlack@google.com>,
"Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>,
"Jacob Pan" <jacob.pan@linux.microsoft.com>,
"Jason Gunthorpe" <jgg@nvidia.com>,
"Josh Hilke" <jrhilke@google.com>,
"Leon Romanovsky" <leonro@nvidia.com>,
"Logan Gunthorpe" <logang@deltatee.com>,
"Lukas Wunner" <lukas@wunner.de>,
"Mike Rapoport" <rppt@kernel.org>,
"Parav Pandit" <parav@nvidia.com>,
"Pasha Tatashin" <pasha.tatashin@soleen.com>,
"Pranjal Shrivastava" <praan@google.com>,
"Pratyush Yadav" <pratyush@kernel.org>,
"Saeed Mahameed" <saeedm@nvidia.com>,
"Samiullah Khawaja" <skhawaja@google.com>,
"Vipin Sharma" <vipinsh@google.com>,
"William Tu" <witu@nvidia.com>
Subject: [PATCH 03/10] PCI: Factor out bridge window probing from pci_read_bridge_windows()
Date: Mon, 19 Oct 2026 21:30:47 +0000 [thread overview]
Message-ID: <20261019213054.3157159-4-dmatlack@google.com> (raw)
In-Reply-To: <20261019213054.3157159-1-dmatlack@google.com>
Move the code that determines which windows a bridge implements, which
requires temporarily writing to the window registers, out of
pci_read_bridge_windows() and into a new helper,
pci_probe_bridge_windows(). Probe all windows before reading any of
them.
A subsequent commit will obtain which windows are implemented by bridges
preserved across Live Update from the previous kernel instead of probing
them, since probing can temporarily disable windows.
No functional change intended.
Assisted-by: LLM
Signed-off-by: David Matlack <dmatlack@google.com>
---
drivers/pci/probe.c | 44 ++++++++++++++++++++++++++++----------------
1 file changed, 28 insertions(+), 16 deletions(-)
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 3cb2e481eddf..473e4389ffae 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -520,19 +520,14 @@ static void pci_read_bridge_mmio_pref(struct pci_dev *dev, struct resource *res,
}
}
-static void pci_read_bridge_windows(struct pci_dev *bridge)
+/*
+ * Determine which windows @bridge implements. This requires temporarily
+ * writing to the window registers of windows that read as zero.
+ */
+static void pci_probe_bridge_windows(struct pci_dev *bridge)
{
- u32 buses;
u16 io;
u32 pmem, tmp;
- struct resource res;
-
- pci_read_config_dword(bridge, PCI_PRIMARY_BUS, &buses);
- res.flags = IORESOURCE_BUS;
- res.start = FIELD_GET(PCI_SECONDARY_BUS_MASK, buses);
- res.end = FIELD_GET(PCI_SUBORDINATE_BUS_MASK, buses);
- pci_info(bridge, "PCI bridge to %pR%s\n", &res,
- bridge->transparent ? " (subtractive decode)" : "");
pci_read_config_word(bridge, PCI_IO_BASE, &io);
if (!io) {
@@ -540,12 +535,8 @@ static void pci_read_bridge_windows(struct pci_dev *bridge)
pci_read_config_word(bridge, PCI_IO_BASE, &io);
pci_write_config_word(bridge, PCI_IO_BASE, 0x0);
}
- if (io) {
+ if (io)
bridge->io_window = 1;
- pci_read_bridge_io(bridge, &res, true);
- }
-
- pci_read_bridge_mmio(bridge, &res, true);
/*
* DECchip 21050 pass 2 errata: the bridge may miss an address
@@ -582,8 +573,29 @@ static void pci_read_bridge_windows(struct pci_dev *bridge)
if (tmp)
bridge->pref_64_window = 1;
}
+}
+
+static void pci_read_bridge_windows(struct pci_dev *bridge)
+{
+ u32 buses;
+ struct resource res;
+
+ pci_read_config_dword(bridge, PCI_PRIMARY_BUS, &buses);
+ res.flags = IORESOURCE_BUS;
+ res.start = FIELD_GET(PCI_SECONDARY_BUS_MASK, buses);
+ res.end = FIELD_GET(PCI_SUBORDINATE_BUS_MASK, buses);
+ pci_info(bridge, "PCI bridge to %pR%s\n", &res,
+ bridge->transparent ? " (subtractive decode)" : "");
+
+ pci_probe_bridge_windows(bridge);
+
+ if (bridge->io_window)
+ pci_read_bridge_io(bridge, &res, true);
+
+ pci_read_bridge_mmio(bridge, &res, true);
- pci_read_bridge_mmio_pref(bridge, &res, true);
+ if (bridge->pref_window)
+ pci_read_bridge_mmio_pref(bridge, &res, true);
}
void pci_read_bridge_bases(struct pci_bus *child)
--
2.56.0.212.g129ede20d9-goog
next prev parent reply other threads:[~2026-10-19 21:31 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-19 21:30 [PATCH 00/10] PCI: liveupdate: Keep preserved devices accessible across Live Update David Matlack
2026-10-19 21:30 ` [PATCH 01/10] PCI: Factor out BAR sizing from pci_read_bases() David Matlack
2026-10-19 21:30 ` [PATCH 02/10] PCI: liveupdate: Avoid sizing BARs of incoming devices David Matlack
2026-10-19 21:30 ` David Matlack [this message]
2026-10-19 21:30 ` [PATCH 04/10] PCI: liveupdate: Avoid probing windows of incoming bridges David Matlack
2026-10-19 21:30 ` [PATCH 05/10] PCI: Skip programming bridge windows that are already programmed David Matlack
2026-10-19 21:30 ` [PATCH 06/10] PCI: liveupdate: Claim resources of incoming devices during scanning David Matlack
2026-10-19 21:30 ` [PATCH 07/10] PCI: liveupdate: Never assign resources of incoming devices David Matlack
2026-10-19 21:30 ` [PATCH 08/10] PCI: liveupdate: Prevent releasing resource windows of incoming bridges David Matlack
2026-10-19 21:30 ` [PATCH 09/10] PCI: liveupdate: Don't realign resources of incoming devices David Matlack
2026-10-19 21:30 ` [PATCH 10/10] PCI: liveupdate: Avoid enabling INTx on " David Matlack
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