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Endpoint functions can then choose which channels to export and map the required windows. Associate each linked-list region with the direction-flattened static channel ID used by the local dw-edma device. Report these resources only after that device is registered and only for channels with linked-list memory. When the register window is already part of a reserved BAR, report its BAR and offset. Otherwise report its CPU physical address. While at it, harden the existing doorbell resource query. Report it only after the local dw-edma device is registered, and reject VF queries because DWC cannot assign DMA/HDMA registers to VFs. Reviewed-by: Frank Li Signed-off-by: Koichiro Den --- Changes since v4: - No changes. .../pci/controller/dwc/pcie-designware-ep.c | 107 ++++++++++++++++-- 1 file changed, 99 insertions(+), 8 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c index 6c18579466b4..2b2988011c3a 100644 --- a/drivers/pci/controller/dwc/pcie-designware-ep.c +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c @@ -858,6 +858,15 @@ dw_pcie_ep_find_bar_rsvd_region(struct dw_pcie_ep *ep, return NULL; } +static int dw_pcie_ep_check_edma_vfunc(u8 vfunc_no) +{ + /* + * The DWC endpoint databook says it is not possible to assign the + * DMA/HDMA registers to any Virtual Function. + */ + return vfunc_no ? -EOPNOTSUPP : 0; +} + static int dw_pcie_ep_get_aux_resources_count(struct pci_epc *epc, u8 func_no, u8 vfunc_no) @@ -865,14 +874,30 @@ dw_pcie_ep_get_aux_resources_count(struct pci_epc *epc, u8 func_no, struct dw_pcie_ep *ep = epc_get_drvdata(epc); struct dw_pcie *pci = to_dw_pcie_from_ep(ep); struct dw_edma_chip *edma = &pci->edma; + u16 ll_wr_cnt, ll_rd_cnt; + int count = 0; + int ret; if (!pci->edma_reg_size) return 0; - if (edma->db_offset == ~0) + ret = dw_pcie_ep_check_edma_vfunc(vfunc_no); + if (ret) + return ret; + + if (!edma->dw) return 0; - return 1; + ll_wr_cnt = edma->ll_wr_cnt; + ll_rd_cnt = edma->ll_rd_cnt; + + if (!edma->cfg_non_ll) + count += 1 + ll_wr_cnt + ll_rd_cnt; + + if (edma->db_offset != ~0) + count++; + + return count; } static int @@ -885,14 +910,32 @@ dw_pcie_ep_get_aux_resources(struct pci_epc *epc, u8 func_no, u8 vfunc_no, const struct pci_epc_bar_rsvd_region *rsvd; struct dw_edma_chip *edma = &pci->edma; enum pci_barno dma_ctrl_bar = NO_BAR; - resource_size_t db_offset = edma->db_offset; + resource_size_t db_offset; resource_size_t dma_ctrl_bar_offset = 0; resource_size_t dma_reg_size; - int count; + u16 ll_wr_cnt, ll_rd_cnt; + bool has_ll; + unsigned int i; + int count, ret; - count = dw_pcie_ep_get_aux_resources_count(epc, func_no, vfunc_no); - if (count < 0) - return count; + if (!pci->edma_reg_size) + return 0; + + ret = dw_pcie_ep_check_edma_vfunc(vfunc_no); + if (ret) + return ret; + + if (!edma->dw) + return 0; + + ll_wr_cnt = edma->ll_wr_cnt; + ll_rd_cnt = edma->ll_rd_cnt; + db_offset = edma->db_offset; + has_ll = !edma->cfg_non_ll; + + count = db_offset != ~0; + if (has_ll) + count += 1 + ll_wr_cnt + ll_rd_cnt; if (num_resources < count) return -ENOSPC; @@ -909,6 +952,54 @@ dw_pcie_ep_get_aux_resources(struct pci_epc *epc, u8 func_no, u8 vfunc_no, if (rsvd && rsvd->size < dma_reg_size) dma_reg_size = rsvd->size; + count = 0; + if (has_ll) { + resources[count++] = (struct pci_epc_aux_resource) { + .type = PCI_EPC_AUX_DMA_CTRL_MMIO, + .phys_addr = pci->edma_reg_phys, + .size = dma_reg_size, + .bar = dma_ctrl_bar, + .bar_offset = dma_ctrl_bar_offset, + .u.dma_ctrl = { + .reg_layout = PCI_EPC_AUX_DMA_REG_LAYOUT_DW_EDMA, + .reg_layout_data = edma->mf, + .ep_to_rc_ch_cnt = ll_wr_cnt, + .rc_to_ep_ch_cnt = ll_rd_cnt, + }, + }; + + for (i = 0; i < ll_wr_cnt; i++) { + struct dw_edma_region *ll = &edma->ll_region_wr[i]; + + resources[count++] = (struct pci_epc_aux_resource) { + .type = PCI_EPC_AUX_DMA_DESC_MEM, + .size = ll->sz, + .bar = NO_BAR, + .u.dma_desc = { + .dma_addr = ll->paddr, + .chan_id = i, + }, + }; + } + + for (i = 0; i < ll_rd_cnt; i++) { + struct dw_edma_region *ll = &edma->ll_region_rd[i]; + + resources[count++] = (struct pci_epc_aux_resource) { + .type = PCI_EPC_AUX_DMA_DESC_MEM, + .size = ll->sz, + .bar = NO_BAR, + .u.dma_desc = { + .dma_addr = ll->paddr, + .chan_id = ll_wr_cnt + i, + }, + }; + } + } + + if (db_offset == ~0) + return 0; + /* * For interrupt-emulation doorbells, report a standalone resource * instead of bundling it into the DMA controller MMIO resource. @@ -917,7 +1008,7 @@ dw_pcie_ep_get_aux_resources(struct pci_epc *epc, u8 func_no, u8 vfunc_no, sizeof(u32), dma_reg_size)) return -EINVAL; - resources[0] = (struct pci_epc_aux_resource) { + resources[count] = (struct pci_epc_aux_resource) { .type = PCI_EPC_AUX_DOORBELL_MMIO, .phys_addr = pci->edma_reg_phys + db_offset, .size = sizeof(u32), -- 2.54.0