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([14.155.180.235]) by smtp.feishu.cn with ESMTPS; Tue, 20 Oct 2026 16:19:29 +0800 Content-Type: text/plain; charset=UTF-8 Subject: [PATCH v2 2/3] riscv: dts: spacemit: k3-deepcomputing-fml13v05: add USB controller and USB phy support Add USB device node (b, c, d) to DeepComputing FML13V05 board. USB A works on otg mode, it isn't configured currently. - 4 USB-C Ports - Port 1: PD 3.0 (65W Max), USB 3.2 Gen 1 - Port 2: PD 3.0 (65W Max), USB 3.2 Gen 1, DP 1.4 (4K@60Hz) - Port 3 & 4: USB 3.2 Gen 1 Signed-off-by: Sandie Cao --- .../spacemit/k3-deepcomputing-fml13v05.dts | 50 +++++++++++++++++++ 1 file changed, 50 insertions(+) diff --git a/arch/riscv/boot/dts/spacemit/k3-deepcomputing-fml13v05.dts b/arch/riscv/boot/dts/spacemit/k3-deepcomputing-fml13v05.dts index 804abc85602a..84f66dd8f962 100644 --- a/arch/riscv/boot/dts/spacemit/k3-deepcomputing-fml13v05.dts +++ b/arch/riscv/boot/dts/spacemit/k3-deepcomputing-fml13v05.dts @@ -179,8 +179,58 @@ dldo7: dldo7 { }; }; +&combophy { + spacemit,apmu = <&syscon_apmu 0x17>; + status = "okay"; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_0_cfg>; status = "okay"; }; + +&usb2_host { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + hub@1 { + compatible = "usb5e3,608"; + reg = <1>; + }; +}; + +&usb2_phy { + status = "okay"; +}; + +&usb3b_u2phy { + status = "okay"; +}; + +&usb3b { + phys = <&usb3b_u2phy>, <&combophy 2 PHY_TYPE_USB3>; + phy-names = "usb2-phy", "usb3-phy"; + status = "okay"; +}; + +&usb3c_u2phy { + status = "okay"; +}; + +&usb3c { + phys = <&usb3c_u2phy>, <&combophy 3 PHY_TYPE_USB3>; + phy-names = "usb2-phy", "usb3-phy"; + status = "okay"; +}; + +&usb3d_u2phy { + status = "okay"; +}; + +&usb3d { + phys = <&usb3d_u2phy>, <&combophy 4 PHY_TYPE_USB3>; + phy-names = "usb2-phy", "usb3-phy"; + status = "okay"; +}; -- 2.43.0