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From: Guobin Zhang <guobin.zhang@intel.com>
To: tchiu@tenstorrent.com
Cc: alex@ghiti.fr, aou@eecs.berkeley.edu, guobin.zhang@intel.com,
	linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
	palmer@dabbelt.com, pjw@kernel.org
Subject: Re: [PATCH] riscv: signal: protect regs->status RMW from concurrent preemption
Date: Tue, 20 Oct 2026 18:03:20 +0800	[thread overview]
Message-ID: <20261020100320.2107301-1-guobin.zhang@intel.com> (raw)
In-Reply-To: <atMjHBJI9LoEve8-@Tao-Chiu's-Mac>

Hi Andy,

Thanks for the review and the suggested approach. I'll send a v2 that
disables preemption at the fstate_save()/fstate_restore() level and
adds the fstate_{save,restore}_preempt_off() variants for the scheduler
and kernel_mode_fpu.

Thanks,
Guobin

      reply	other threads:[~2026-10-20 10:03 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-07  3:00 Guobin Zhang
2026-09-25  4:33 ` Aurelien Jarno
2026-10-08 11:28   ` Zhang, Guobin
2026-10-17  7:38   ` Andy Chiu
2026-10-17  7:26 ` [PATCH] " Andy Chiu
2026-10-20 10:03   ` Guobin Zhang [this message]

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