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[80.193.62.245]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-48e2581f0d4sm50665f8f.13.2026.10.20.11.10.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 20 Oct 2026 11:10:27 -0700 (PDT) From: George Neacsu To: Sergey Lebedev , Benjamin Mugnier Cc: Sakari Ailus , Sylvain Petinot , Mauro Carvalho Chehab , Dan Scally , Hans de Goede , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Peter Marshall , Hao Yao , linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 2/4] media: i2c: Add ST VD55G0 global shutter sensor driver Date: Tue, 20 Oct 2026 19:10:25 +0100 Message-ID: <20261020181025.8625-1-geocausa@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20261020142641.24808-1-lsa.uz@pm.me> References: <20261019162722.25587-1-lsa.uz@pm.me> <20261019162722.25587-3-lsa.uz@pm.me> <179243379000.31842.4735750009847702427@gmail.com> <20261019193402.52923-1-lsa.uz@pm.me> <179247822513.25202.7960395606350309657@gmail.com> <20261020085200.60619-1-lsa.uz@pm.me> <20261020142641.24808-1-lsa.uz@pm.me> X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Hi Benjamin, Sergey, On 20/10/2026 15:26, Sergey Lebedev wrote: > So I agree the register itself > should not matter there; something else in v1 probably does, and George > can narrow it down on CAMSS better than I can. You were both right, and I have to correct my earlier report. I looked at the receiver side with a CSID change that only reads registers at stream start. RDI0 is set up for data type 0x2b (RAW10), VC 0, with no ECC or CRC errors, so CAMSS filters on the data type and the ISL lines (DT 0x12) should not reach the buffer. With that in place I reran the exact v1 module that stalled this morning: same build, 403.2 MHz in the DT, and the ISL_ENABLE=0 write still in. It streamed 5/5 frames, 120/120 at about 60.2 fps, and 10/10 on an immediate restart. Builds that wrote 0 and builds that left the default behaved the same, and read back 0x00 and 0x01 respectively. To rule out the diagnostic reads changing the timing, I then booted again with the unmodified CAMSS module and the same exact v1 module: three rounds of 5, 120 and 10 frames, all complete, at about 60.2 fps, with no CAMSS errors. So clearing 0x0329 does not cause the stall on this machine. My earlier A/B was a correlation, not the cause; something else in those runs made the difference, and I have not pinned it down yet. I tried to count the DT 0x12 packets directly with the CSID's long-packet capture, but enabling that capture changed the behaviour itself (one frame only), so it could not serve as a passive observer. Sergey, the write can stay or go as you prefer; the Snapdragon model does not need it dropped. The 403.2 MHz link frequency still stands. I will test v2 on the X1E80100 and send a Tested-by if it passes. Sorry for the noise. Thanks, George