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[67.168.198.145]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2ea3b434e67sm3125145ad.27.2026.10.20.13.47.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 20 Oct 2026 13:47:48 -0700 (PDT) From: Rob Clark To: dri-devel@lists.freedesktop.org Cc: linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org, Alexander Koskovich , Jie Zhang , Akhil P Oommen , Bhaskar Reddy Valluru , Rob Clark , Sean Paul , Konrad Dybcio , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Marijn Suijten , David Airlie , Simona Vetter , linux-kernel@vger.kernel.org (open list) Subject: [PATCH 02/12] drm/msm/a8xx: Export aperture helpers Date: Tue, 20 Oct 2026 13:46:16 -0700 Message-ID: <20261020204728.28844-3-robin.clark@oss.qualcomm.com> X-Mailer: git-send-email 2.56.0 In-Reply-To: <20261020204728.28844-1-robin.clark@oss.qualcomm.com> References: <20261020204728.28844-1-robin.clark@oss.qualcomm.com> X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Proofpoint-ORIG-GUID: ZG_IcIZeS0BlXOcd4eKUrBfCxGyjjSKn X-Proofpoint-GUID: ZG_IcIZeS0BlXOcd4eKUrBfCxGyjjSKn X-Proofpoint-Spam-Info: AW1haW4tMjYxMDIwMDA4MiBTYWx0ZWRfX0z8k+toCsVrh JI7iaePTQPiAURG9tJJaJzK1URKUV/u7rWKo4Gl67X9eg/5qgT9Yydd2P666dKJTvKYbLN3hbJf M2N5kUj/GcGweW1+LtwbzK4f/p09rHY= X-Authority-Analysis: v=2.4 cv=R7aWitRX c=1 sm=1 tr=0 ts=6ad7d375 cx=c_pps a=JL+w9abYAAE89/QcEU+0QA==:117 a=6Rn/7xRx7Ub4NEhlm8k1cw==:17 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=Um2Pa8k9VHT-vaBCBUpS:22 a=EUspDBNiAAAA:8 a=58qa3DtRz-ucCGMA3goA:9 a=324X-CrmTo6CU4MGRt3R:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDIwMDA4MiBTYWx0ZWRfX2q7Qek8OQyuQ 7aA9ITs+twQsftyRYe8ZLsnFOJ4oiOqdb5EgBP3IrRl1uBs9R4pDOMQI7++WhN4FPKC48QjQcTV XNUL6BDIaTkYwUNf9oo6Kl8vj79jjFjsxxz497YTPN3hbj0Arr1cGMRuloHQcsRAxDC/sM01YL+ 6fF1gtUfq8tHENgybSBSZpTdjnku+9JKAUkNgpuLPP6A8LR5ARwIukzl62k30As0d7GvsuyLQPC gNP+7LY3NlRNpeSke1PPqCz4DvzC4tYAddMgI000ubTZ1EN/cA+UxrbHYTnJ1iKUW+VNXW4qvSY p5rPB3yjW4J9jj1xx1orbZGBBr5QKFxn66b+9UlqPPXYUu5r4eRTjCxc8VNAsLY6u06vS066MUU wNRRwNFR8E9asmPtQRG7KxZfKcQb7OnQj6v2OjfbwJihBO8Pekqa2JdEzVxlzA5M1mrjCf/5Tps 9wX+l5qMnuo4FVO2LAQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-10-20_03,2026-10-19_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 adultscore=0 priorityscore=1501 lowpriorityscore=0 clxscore=1015 impostorscore=0 bulkscore=0 spamscore=0 suspectscore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610190000 definitions=main-2610200082 We'll need these from gen8 gpu state snapshot code as well. Signed-off-by: Rob Clark --- drivers/gpu/drm/msm/adreno/a6xx_gpu.h | 3 +++ drivers/gpu/drm/msm/adreno/a8xx_gpu.c | 6 +++--- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.h b/drivers/gpu/drm/msm/adreno/a6xx_gpu.h index 81d21acccea1..fb000b79fe2f 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.h +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.h @@ -348,6 +348,9 @@ void a6xx_flush(struct msm_gpu *gpu, struct msm_ringbuffer *ring); void a6xx_flush_yield(struct msm_gpu *gpu, struct msm_ringbuffer *ring); int a6xx_zap_shader_init(struct msm_gpu *gpu); +void a8xx_aperture_acquire(struct msm_gpu *gpu, enum adreno_pipe pipe, unsigned long *flags); +void a8xx_aperture_release(struct msm_gpu *gpu, unsigned long flags); +void a8xx_aperture_clear(struct msm_gpu *gpu); void a8xx_bus_clear_pending_transactions(struct adreno_gpu *adreno_gpu, bool gx_off); int a8xx_fault_handler(void *arg, unsigned long iova, int flags, void *data); void a8xx_flush(struct msm_gpu *gpu, struct msm_ringbuffer *ring); diff --git a/drivers/gpu/drm/msm/adreno/a8xx_gpu.c b/drivers/gpu/drm/msm/adreno/a8xx_gpu.c index e7d04c865968..a14379e26fbe 100644 --- a/drivers/gpu/drm/msm/adreno/a8xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a8xx_gpu.c @@ -32,7 +32,7 @@ static void a8xx_aperture_slice_set(struct msm_gpu *gpu, enum adreno_pipe pipe, a6xx_gpu->cached_aperture = val; } -static void a8xx_aperture_acquire(struct msm_gpu *gpu, enum adreno_pipe pipe, unsigned long *flags) +void a8xx_aperture_acquire(struct msm_gpu *gpu, enum adreno_pipe pipe, unsigned long *flags) { struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu); @@ -42,7 +42,7 @@ static void a8xx_aperture_acquire(struct msm_gpu *gpu, enum adreno_pipe pipe, un a8xx_aperture_slice_set(gpu, pipe, 0); } -static void a8xx_aperture_release(struct msm_gpu *gpu, unsigned long flags) +void a8xx_aperture_release(struct msm_gpu *gpu, unsigned long flags) { struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu); @@ -50,7 +50,7 @@ static void a8xx_aperture_release(struct msm_gpu *gpu, unsigned long flags) spin_unlock_irqrestore(&a6xx_gpu->aperture_lock, flags); } -static void a8xx_aperture_clear(struct msm_gpu *gpu) +void a8xx_aperture_clear(struct msm_gpu *gpu) { unsigned long flags; -- 2.56.0