From: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
To: Manivannan Sadhasivam <mani@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Bartosz Golaszewski <brgl@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>
Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org,
linux-arm-msm@vger.kernel.org,
Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
Subject: [PATCH 2/3] power: sequencing: pcie-m2: Add support for PCIe M.2 Key B connectors
Date: Wed, 21 Oct 2026 19:21:23 +0530 [thread overview]
Message-ID: <20261021-pcie6_fix-v1-2-ad37134c35a3@oss.qualcomm.com> (raw)
In-Reply-To: <20261021-pcie6_fix-v1-0-ad37134c35a3@oss.qualcomm.com>
Add support for handling the power sequence of the PCIe M.2 Key B
connectors. These connectors are used to attach WWAN Adapters to the
host machine over interfaces such as PCIe, USB3.1 Gen1, SSIC, or USB
2.0.
Currently, this driver only supports driving the 3.3V/VBAT power
supply along with the FULL_CARD_POWER_OFF#, RESET#, and W_DISABLE1#/2#
GPIOs as a single "pcie" target, since Key B Adapters expose only a
discoverable PCIe/USB interface and no non-discoverable bus (unlike
Key E's UART-attached Bluetooth device), so no serdev creation is
needed. The optional WAKE_ON_WWAN# and DPR signals are not currently
supported.
Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
---
drivers/power/sequencing/pwrseq-pcie-m2.c | 82 +++++++++++++++++++++++++++++++
1 file changed, 82 insertions(+)
diff --git a/drivers/power/sequencing/pwrseq-pcie-m2.c b/drivers/power/sequencing/pwrseq-pcie-m2.c
index e42e85f47629..62185bf30d73 100644
--- a/drivers/power/sequencing/pwrseq-pcie-m2.c
+++ b/drivers/power/sequencing/pwrseq-pcie-m2.c
@@ -39,6 +39,8 @@ struct pwrseq_pcie_m2_ctx {
struct notifier_block nb;
struct gpio_desc *w_disable1_gpio;
struct gpio_desc *w_disable2_gpio;
+ struct gpio_desc *full_card_power_off_gpio;
+ struct gpio_desc *reset_gpio;
struct device *dev;
struct list_head pci_devices;
struct mutex list_lock;
@@ -111,6 +113,53 @@ static const struct pwrseq_unit_data pwrseq_pcie_m2_e_pcie_unit_data = {
.disable = pwrseq_pci_m2_e_pcie_disable,
};
+static int pwrseq_pci_m2_b_pcie_enable(struct pwrseq_device *pwrseq)
+{
+ struct pwrseq_pcie_m2_ctx *ctx = pwrseq_device_get_drvdata(pwrseq);
+ int ret;
+
+ ret = gpiod_set_value_cansleep(ctx->full_card_power_off_gpio, 0);
+ if (ret)
+ return ret;
+
+ ret = gpiod_set_value_cansleep(ctx->reset_gpio, 0);
+ if (ret)
+ return ret;
+
+ ret = gpiod_set_value_cansleep(ctx->w_disable1_gpio, 0);
+ if (ret)
+ return ret;
+
+ return gpiod_set_value_cansleep(ctx->w_disable2_gpio, 0);
+}
+
+static int pwrseq_pci_m2_b_pcie_disable(struct pwrseq_device *pwrseq)
+{
+ struct pwrseq_pcie_m2_ctx *ctx = pwrseq_device_get_drvdata(pwrseq);
+ int ret;
+
+ ret = gpiod_set_value_cansleep(ctx->w_disable2_gpio, 1);
+ if (ret)
+ return ret;
+
+ ret = gpiod_set_value_cansleep(ctx->w_disable1_gpio, 1);
+ if (ret)
+ return ret;
+
+ ret = gpiod_set_value_cansleep(ctx->reset_gpio, 1);
+ if (ret)
+ return ret;
+
+ return gpiod_set_value_cansleep(ctx->full_card_power_off_gpio, 1);
+}
+
+static const struct pwrseq_unit_data pwrseq_pcie_m2_b_pcie_unit_data = {
+ .name = "pcie-enable",
+ .deps = pwrseq_pcie_m2_unit_deps,
+ .enable = pwrseq_pci_m2_b_pcie_enable,
+ .disable = pwrseq_pci_m2_b_pcie_disable,
+};
+
static const struct pwrseq_unit_data pwrseq_pcie_m2_m_pcie_unit_data = {
.name = "pcie-enable",
.deps = pwrseq_pcie_m2_unit_deps,
@@ -140,6 +189,11 @@ static const struct pwrseq_target_data pwrseq_pcie_m2_e_pcie_target_data = {
.post_enable = pwrseq_pcie_m2_e_pwup_delay,
};
+static const struct pwrseq_target_data pwrseq_pcie_m2_b_pcie_target_data = {
+ .name = "pcie",
+ .unit = &pwrseq_pcie_m2_b_pcie_unit_data,
+};
+
static const struct pwrseq_target_data pwrseq_pcie_m2_m_pcie_target_data = {
.name = "pcie",
.unit = &pwrseq_pcie_m2_m_pcie_unit_data,
@@ -151,6 +205,11 @@ static const struct pwrseq_target_data *pwrseq_pcie_m2_e_targets[] = {
NULL
};
+static const struct pwrseq_target_data *pwrseq_pcie_m2_b_targets[] = {
+ &pwrseq_pcie_m2_b_pcie_target_data,
+ NULL
+};
+
static const struct pwrseq_target_data *pwrseq_pcie_m2_m_targets[] = {
&pwrseq_pcie_m2_m_pcie_target_data,
NULL
@@ -160,6 +219,10 @@ static const struct pwrseq_pcie_m2_pdata pwrseq_pcie_m2_e_of_data = {
.targets = pwrseq_pcie_m2_e_targets,
};
+static const struct pwrseq_pcie_m2_pdata pwrseq_pcie_m2_b_of_data = {
+ .targets = pwrseq_pcie_m2_b_targets,
+};
+
static const struct pwrseq_pcie_m2_pdata pwrseq_pcie_m2_m_of_data = {
.targets = pwrseq_pcie_m2_m_targets,
};
@@ -534,6 +597,21 @@ static int pwrseq_pcie_m2_probe(struct platform_device *pdev)
goto err_free_regulators;
}
+ ctx->full_card_power_off_gpio = devm_gpiod_get_optional(dev, "full-card-power-off",
+ GPIOD_OUT_HIGH);
+ if (IS_ERR(ctx->full_card_power_off_gpio)) {
+ ret = dev_err_probe(dev, PTR_ERR(ctx->full_card_power_off_gpio),
+ "Failed to get the FULL_CARD_POWER_OFF# GPIO\n");
+ goto err_free_regulators;
+ }
+
+ ctx->reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH);
+ if (IS_ERR(ctx->reset_gpio)) {
+ ret = dev_err_probe(dev, PTR_ERR(ctx->reset_gpio),
+ "Failed to get the RESET# GPIO\n");
+ goto err_free_regulators;
+ }
+
config.parent = dev;
config.owner = THIS_MODULE;
config.drvdata = ctx;
@@ -598,6 +676,10 @@ static const struct of_device_id pwrseq_pcie_m2_of_match[] = {
.compatible = "pcie-m2-e-connector",
.data = &pwrseq_pcie_m2_e_of_data,
},
+ {
+ .compatible = "pcie-m2-b-connector",
+ .data = &pwrseq_pcie_m2_b_of_data,
+ },
{ }
};
MODULE_DEVICE_TABLE(of, pwrseq_pcie_m2_of_match);
--
2.34.1
next prev parent reply other threads:[~2026-10-21 13:51 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-21 13:51 [PATCH 0/3] power: sequencing: pcie-m2: Add PCIe M.2 Key B connector support Krishna Chaitanya Chundru
2026-10-21 13:51 ` [PATCH 1/3] dt-bindings: connector: Add PCIe M.2 Mechanical Key B connector Krishna Chaitanya Chundru
2026-10-21 15:44 ` Alexey Charkov
2026-10-21 13:51 ` Krishna Chaitanya Chundru [this message]
2026-10-21 13:51 ` [PATCH 3/3] arm64: dts: qcom: glymur-crd: Describe the PCIe M.2 " Krishna Chaitanya Chundru
2026-10-21 14:06 ` Konrad Dybcio
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