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Wed, 21 Oct 2026 01:07:03 -0700 From: Manikanta Maddireddy To: , , CC: , , , , , , , , , , Subject: [PATCH v1] PCI: endpoint: Skip upper halves of 64-bit BARs during search Date: Wed, 21 Oct 2026 13:36:44 +0530 Message-ID: <20261021080644.1346549-1-mmaddireddy@nvidia.com> X-Mailer: git-send-email 2.34.1 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 X-NVConfidentiality: public Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: rnnvmail201.nvidia.com (10.129.68.8) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ5PEPF000001EE:EE_|DM6PR12MB4233:EE_ X-MS-Office365-Filtering-Correlation-Id: fdd2e15b-4e07-4a84-3087-08df2f4a5660 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|23010399003|376014|7416014|36860700016|82310400026|56012099006|11063799006|261009223027099003|10067099003|18002099003|6133799003|3023799007; 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If the search subsequently passes a reserved or disabled 64-bit BAR, it can return its upper half as an independent BAR because that slot has a default programmable descriptor. For example, Tegra exposes a programmable 64-bit BAR0 and reserved 64-bit BAR2 and BAR4. A search starting at BAR1 skips BAR1 and BAR2, then incorrectly returns BAR3. The next search can similarly return BAR5, causing the EPF test driver to allocate and program BARs that belong to the reserved hardware windows. Check each candidate's preceding descriptor inside the search loop so upper halves are skipped throughout the search. With the Tegra layout, BAR0 is the only available BAR and subsequent searches return NO_BAR. Signed-off-by: Manikanta Maddireddy --- drivers/pci/endpoint/pci-epc-core.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/pci/endpoint/pci-epc-core.c b/drivers/pci/endpoint/pci-epc-core.c index 831b40458dcd..8d0df9fc1df9 100644 --- a/drivers/pci/endpoint/pci-epc-core.c +++ b/drivers/pci/endpoint/pci-epc-core.c @@ -98,11 +98,11 @@ enum pci_barno pci_epc_get_next_free_bar(const struct pci_epc_features if (!epc_features) return BAR_0; - /* If 'bar - 1' is a 64-bit BAR, move to the next BAR */ - if (bar > 0 && epc_features->bar[bar - 1].only_64bit) - bar++; - for (i = bar; i < PCI_STD_NUM_BARS; i++) { + /* Skip the upper half of a 64-bit BAR. */ + if (i > 0 && epc_features->bar[i - 1].only_64bit) + continue; + /* If the BAR is not reserved or disabled, return it. */ if (epc_features->bar[i].type != BAR_RESERVED && epc_features->bar[i].type != BAR_DISABLED) -- 2.34.1