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Wed, 21 Oct 2026 03:47:15 -0700 (PDT) Received: from hu-weiden-sha.qualcomm.com ([114.94.8.21]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3ad85f6ff0dsm1619244a91.4.2026.10.21.03.47.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 21 Oct 2026 03:47:15 -0700 (PDT) From: Wei Deng To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Abel Vesa , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, quic_chezhou@quicinc.com, cheng.jiang@oss.qualcomm.com, shuai.zhang@oss.qualcomm.com, jinwang.li@oss.qualcomm.com, xiuzhuo.shang@oss.qualcomm.com, mengshi.wu@oss.qualcomm.com Subject: [PATCH] arm64: dts: qcom: monaco-ac-evk: Describe the PCIe M.2 Key E connector Date: Wed, 21 Oct 2026 16:17:09 +0530 Message-Id: <20261021104709.1428234-1-wei.deng@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Authority-Analysis: v=2.4 cv=S/NMU4sP c=1 sm=1 tr=0 ts=6ad89834 cx=c_pps a=UNFcQwm+pnOIJct1K4W+Mw==:117 a=Uz3yg00KUFJ2y2WijEJ4bw==:17 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_glEPmIy2e8OvE2BGh3C:22 a=EUspDBNiAAAA:8 a=9xWqd1REYw3mqEFhcE4A:9 a=uKXjsCUrEbL0IQVhDsJ9:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDIxMDA0MiBTYWx0ZWRfX4dMTKJcB91fE 5KQd3FIweXkld0ZB+7qs8h8vR5XBS+QmqXHVx+uW42XwVJZNiSQ+xxE/PBupJ/98rGJKsKs9itE LNi9+pI3X+UzpntJieyhrRgVWGXTcnLz2i2c6oGAH/43GlvCG9et3RRgmpWaxnV+nWgYH+K0EuJ ES9O/9ohecjymxk/GU/IkB3KMjGAnfRSexk1t599MaqZE6W19FV67mi8ye8iYHmvyrMYWQyWleJ lmEv8Qy1uwylBtypCSdfyF7VMbZb4nOZM5Ich6b7yvewF2MOKQRB/x4/vwdXfk/CW8zDZ3pmgiF KGU4/UJQzdXfAsyQCrUtG5vt/CjT7nvumpoVK4iQgpRzJ0OA3AtUvr6mR0TDfUsKGSQtDM1tOlw Bd91og5INJYHbTDgUPD3xBdndpGIN+qVyueqO+aX+Tk13f+2JZjOjdyJBGEnwZwdWBDlwjy8BX7 TqIYmW8svFVAz7rUCeA== X-Proofpoint-ORIG-GUID: DR155pFg9JLvniX0muyY32d4PIvesHK2 X-Proofpoint-Spam-Info: AW1haW4tMjYxMDIxMDA0MiBTYWx0ZWRfX2zk0hTTxrT/G /vUq7NOTVYbpQMObJfGsWhXi4r1zdgDihCH5ny+Jd0Z2YuAWYzA6+1558KVVtg1HCvmEouYP/hr crP7P0YiyJ16zniDYGcgsynLFhUwwdM= X-Proofpoint-GUID: DR155pFg9JLvniX0muyY32d4PIvesHK2 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-10-21_03,2026-10-19_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 clxscore=1015 priorityscore=1501 spamscore=0 bulkscore=0 lowpriorityscore=0 malwarescore=0 phishscore=0 impostorscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610190000 definitions=main-2610210042 The Monaco AC EVK has a PCIe M.2 Mechanical Key E connector to connect wireless connectivity cards over PCIe and UART interfaces. Hence, describe the connector node and link it with the PCIe 0 Root Port and UART2 nodes through graph port/endpoint. The port/endpoint nodes are defined inline in the board file rather than as empty anchor nodes in the SoC DTSI, so that of_graph_is_present() only returns true for boards that have an M.2 Key E connector present, preventing unintended pwrseq probe on boards with soldered wireless chips (e.g. qcs8300-ride). The connector's 3.3V supply is described as a fixed always-on regulator (vreg_wcn_3p3), which is required by the pcie-m2-e-connector binding. Also add the serial1 = &uart2 alias, which is required for the Bluetooth serdev device to be enumerated on the UART2 interface. Signed-off-by: Wei Deng --- arch/arm64/boot/dts/qcom/monaco-ac-evk.dts | 60 ++++++++++++++++++++++ 1 file changed, 60 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/monaco-ac-evk.dts b/arch/arm64/boot/dts/qcom/monaco-ac-evk.dts index 6f3c3ffefe34..3780642fe483 100644 --- a/arch/arm64/boot/dts/qcom/monaco-ac-evk.dts +++ b/arch/arm64/boot/dts/qcom/monaco-ac-evk.dts @@ -21,6 +21,7 @@ aliases { ethernet0 = ðernet0; i2c1 = &i2c1; serial0 = &uart7; + serial1 = &uart2; serial2 = &uart6; }; @@ -47,6 +48,38 @@ usb2_con_hs_ep: endpoint { }; }; + connector-3 { + compatible = "pcie-m2-e-connector"; + vpcie3v3-supply = <&vreg_wcn_3p3>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + m2_e_pcie_ep: endpoint@0 { + reg = <0>; + remote-endpoint = <&pcieport0_ep>; + }; + }; + + port@3 { + reg = <3>; + #address-cells = <1>; + #size-cells = <0>; + + m2_e_uart_ep: endpoint@0 { + reg = <0>; + remote-endpoint = <&uart2_ep>; + }; + }; + }; + }; + dmic: audio-codec-0 { compatible = "dmic-codec"; #sound-dai-cells = <0>; @@ -91,6 +124,17 @@ usb2_vbus: regulator-usb2-vbus { enable-active-high; }; + vreg_wcn_3p3: regulator-wcn-3p3 { + compatible = "regulator-fixed"; + + regulator-name = "VREG_WCN_3P3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + regulator-always-on; + regulator-boot-on; + }; + sound { compatible = "qcom,qcs8275-sndcard"; model = "MONACO-EVK"; @@ -657,6 +701,12 @@ &pcie1_phy { &pcieport0 { reset-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>; wake-gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>; + + port { + pcieport0_ep: endpoint { + remote-endpoint = <&m2_e_pcie_ep>; + }; + }; }; &pcieport1 { @@ -875,6 +925,16 @@ expander4_int: expander4-int-state { }; }; +&uart2 { + status = "okay"; + + port { + uart2_ep: endpoint { + remote-endpoint = <&m2_e_uart_ep>; + }; + }; +}; + &uart6 { status = "okay"; }; -- 2.34.1