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[93.34.92.187]) by smtp.googlemail.com with ESMTPSA id 5b1f17b1804b1-4a1fcd70027sm27793675e9.0.2026.10.21.08.40.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 21 Oct 2026 08:40:01 -0700 (PDT) From: Christian Marangi To: Stefan Roese , Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Cc: Christian Marangi Subject: [PATCH 2/2] i2c: mt7621: limit SCL_STRETCH only to Mediatek SoC Date: Wed, 21 Oct 2026 17:39:52 +0200 Message-ID: <20261021153953.285222-2-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20261021153953.285222-1-ansuelsmth@gmail.com> References: <20261021153953.285222-1-ansuelsmth@gmail.com> X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The same I2C driver is also used for Airoha SoC with the only difference that the i2c_reset should not enable SCL_STRETCH for Airoha SoC. Introduce a new compatible for Airoha and limit the SCL_STRETCH only to Mediatek SoC. Signed-off-by: Christian Marangi --- drivers/i2c/busses/i2c-mt7621.c | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) diff --git a/drivers/i2c/busses/i2c-mt7621.c b/drivers/i2c/busses/i2c-mt7621.c index 0a288c998419..19dde7c4069e 100644 --- a/drivers/i2c/busses/i2c-mt7621.c +++ b/drivers/i2c/busses/i2c-mt7621.c @@ -65,6 +65,7 @@ struct mtk_i2c { u32 clk_div; u32 flags; struct clk *clk; + bool have_scl_stretch; }; static int mtk_i2c_wait_idle(struct mtk_i2c *i2c) @@ -83,6 +84,7 @@ static int mtk_i2c_wait_idle(struct mtk_i2c *i2c) static void mtk_i2c_reset(struct mtk_i2c *i2c) { + u32 reg; int ret; ret = device_reset(i2c->adap.dev.parent); @@ -93,8 +95,11 @@ static void mtk_i2c_reset(struct mtk_i2c *i2c) * Don't set SM0CTL0_ODRAIN as its bit meaning is inverted. To * configure open-drain mode, this bit needs to be cleared. */ - iowrite32(((i2c->clk_div << 16) & SM0CTL0_CLK_DIV_MASK) | SM0CTL0_EN | - SM0CTL0_SCL_STRETCH, i2c->base + REG_SM0CTL0_REG); + reg = ((i2c->clk_div << 16) & SM0CTL0_CLK_DIV_MASK) | SM0CTL0_EN; + if (i2c->have_scl_stretch) + reg |= SM0CTL0_SCL_STRETCH; + + iowrite32(reg, i2c->base + REG_SM0CTL0_REG); iowrite32(0, i2c->base + REG_SM0CFG2_REG); } @@ -249,6 +254,7 @@ static const struct i2c_algorithm mtk_i2c_algo = { static const struct of_device_id i2c_mtk_dt_ids[] = { { .compatible = "mediatek,mt7621-i2c" }, + { .compatible = "airoha,an7581-i2c" }, { /* sentinel */ } }; @@ -296,6 +302,10 @@ static int mtk_i2c_probe(struct platform_device *pdev) return -EINVAL; } + /* Set SCL_STRETCH only for Mediatek SoC */ + if (device_is_compatible(i2c->dev, "mediatek,mt7621-i2c")) + i2c->have_scl_stretch = true; + adap = &i2c->adap; adap->owner = THIS_MODULE; adap->algo = &mtk_i2c_algo; -- 2.55.0