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Wed, 21 Oct 2026 10:28:22 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 relay.smtp-ext.broadcom.com 98A71C0000D8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=broadcom.com; s=dkimrelay; t=1792603702; bh=7YXMz6ICeOkY0HuKXHTL8W02G5699zBtL4gEQsBoYnI=; h=From:To:Cc:Subject:Date:From; b=f/p7JIEBqH++4zlYLGD6SWFdY0oXIIRoTNs1R11XWJGmkirvfaQMZgMncRG8mXRq+ McWOCcjKdsDHBLsUHe7eN7BcwNhzngDRixdRRTnsRExYaojm2w0zJ5Ks6HZAhO4OlO XCQTmuF2uZCc1QP6XTlMmFJYQxX/OAc1gcLHLuaQ= Received: from fainelli-desktop.igp.broadcom.net (fainelli-desktop.dhcp.broadcom.net [10.67.48.245]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mail-acc-it-01.broadcom.com (Postfix) with ESMTPSA id F131CAEA2; Wed, 21 Oct 2026 13:28:20 -0400 (EDT) From: Florian Fainelli To: linux-arm-kernel@lists.infradead.org Cc: Florian Fainelli , Vinod Koul , Neil Armstrong , Manivannan Sadhasivam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Greg Kroah-Hartman , Ray Jui , Scott Branden , Broadcom internal kernel review list , Alan Stern , =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= , Kishon Vijay Abraham I , Yendapally Reddy Dhananjaya Reddy , linux-phy@lists.infradead.org (open list:GENERIC PHY FRAMEWORK), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-kernel@vger.kernel.org (open list), linux-usb@vger.kernel.org (open list:USB SUBSYSTEM) Subject: [PATCH 0/9] Fix USB2 and USB3 on NSP SoCs Date: Wed, 21 Oct 2026 10:28:09 -0700 Message-ID: <20261021172819.668120-1-florian.fainelli@broadcom.com> X-Mailer: git-send-email 2.53.0 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Similar to the SATA patch series, USB2 and USB3 on Northstar Plus SoCs was broken in a few different areas: - the NSP variant was not described properly at the USB PHY level which prevented SoC-specific initialization from occurring - the lack of DMP registers meant that the USB PHY could not complete the initilization and instead relies on the boot loader - the EHCI controller requires some FIFO tuning which is similar to the XGS iProc SoC, otherwise DMA transfers eventually fail - finally, the USB controllers are non coherent Florian Fainelli (9): phy: broadcom: ns-usb3: Propagate Bx initialization write errors dt-bindings: phy: bcm-ns-usb3-phy: Describe the NSP variant phy: broadcom: ns-usb3: Coordinate NSP USB2 and USB3 initialization ARM: dts: broadcom: Add the NSP USB2 DMP registers ARM: dts: broadcom: Share USB PHY initialization on BCM958625HR dt-bindings: usb: generic-ehci: Add the NSP compatible usb: host: ehci-platform: Set the FIFO threshold on NSP ARM: dts: broadcom: Identify the NSP EHCI controller ARM: dts: broadcom: Use noncoherent USB DMA on BCM958625HR .../bindings/phy/bcm-ns-usb3-phy.yaml | 23 +++ .../devicetree/bindings/usb/generic-ehci.yaml | 1 + arch/arm/boot/dts/broadcom/bcm-nsp.dtsi | 6 +- arch/arm/boot/dts/broadcom/bcm958625hr.dts | 9 ++ drivers/phy/broadcom/phy-bcm-ns-usb3.c | 134 +++++++++++++----- drivers/usb/host/ehci-platform.c | 3 +- 6 files changed, 139 insertions(+), 37 deletions(-) -- 2.53.0