From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.remote-ip=159.226.251.81 ARC-Seal: i=1; d=subspace.kernel.org; s=arc20261015; a=rsa-sha256; cv=none; t=1792612126; b=2EULykZzMttZqr2V9jKZtIcUnYXc9L3QFctEdplDT4HEANItQ69DpGyt1F71SvMUtghw auRvSX3vdut4eRCxwPA2qsQ+kaXnDvEo07C++gidHcz8jhRxEknjA8PVJEbpSfu5QHYpb 5XPArzwNMMhoKahXuCnH7MNMpUepUkpZSqYLOKYC9QAPw55lLvGvB5pblfUM3TrmF1TqP orcuouo5VH7d/+GS06nq3EVmtD8vX10iU2+H4unw/PLsBa9xRWPrpEeROm6F0USFEel0N s7JdWPPwcKGAqtPoq4CM8PkNt9+28VnOoWqg/5DHE7IUJvOi4RMfa9fNvDHpC1rZepg== ARC-Message-Signature: i=1; d=subspace.kernel.org; s=arc20261015; a=rsa-sha256; c=relaxed/relaxed; t=1792612126; h=DMARC-Filter:Received:From:Date:Subject:MIME-Version:Content-Type: Content-Transfer-Encoding:Message-Id:References:In-Reply-To:To:Cc: X-Mailer:X-CM-TRANSID:X-Coremail-Antispam:X-Originating-IP: X-CM-SenderInfo; bh=8zdkSy4S9d8mahCstou+MAd3++gCJOCaSRrb4UBEAWU=; b=cH9Q5dzIn8PdrzXfGMZI/9gRS9DFjeIxlq5fBCPpoh6A0Y1i/5QZg5VXjw6fva5WUpG3 OvkqJDUWKus3bo6IIB7WKITBeGQsy9EX9G3lm4nbTyCPfnkhha/36MzMt1f1aDAmBuLh6 0oz1xHKyg7To7pVyQ8qJvhYj3R3HHBojOvdghr8oZkLK4B0WBY2QE3BB2+ZE/hmqCdoJ3 k20lZfRfYDsL82FUokX4seDzOhgXY/IGC824EnNAQWpgTbKIpM5fTGrfKLR/pKrr0SXlk sAdbKvs8chPecbxuUFCXE5O4E8s550KvnkRxf1trMYcr74XrTmjd6DDTsgfmaXTbCkQ== ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none header.from=iscas.ac.cn; spf=pass smtp.mailfrom=iscas.ac.cn; arc=none smtp.remote-ip=159.226.251.81 Received: from cstnet.cn (smtp81.cstnet.cn [159.226.251.81]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (prime256v1) server-digest SHA256) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AC357606A31D; Wed, 21 Oct 2026 19:48:42 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.2 smtp.subspace.kernel.org AC357606A31D Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=iscas.ac.cn Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=iscas.ac.cn Received: from [127.0.1.1] (unknown [223.166.93.48]) by APP-03 (Coremail) with SMTP id rQCowAB3gT_6Ftlqxu5hCw--.4480S4; Thu, 22 Oct 2026 03:48:14 +0800 (CST) From: Han Gao Date: Thu, 22 Oct 2026 03:48:10 +0800 Subject: [PATCH 02/18] riscv: add Zhihe A210 support X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20261022-a210-init-v1-2-09fb4d99da65@iscas.ac.cn> References: <20261022-a210-init-v1-0-09fb4d99da65@iscas.ac.cn> In-Reply-To: <20261022-a210-init-v1-0-09fb4d99da65@iscas.ac.cn> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Zhiguo Zhu , Stephen Boyd , Brian Masney , Jerome Brunet , Philipp Zabel , Linus Walleij , Bartosz Golaszewski , Thomas Gleixner , Radu Rendec , Samuel Holland , Daniel Lezcano , Anup Patel , Icenowy Zheng , Drew Fustini Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org, Paul Walmsley , Han Gao X-Mailer: b4 0.16.0 X-CM-TRANSID:rQCowAB3gT_6Ftlqxu5hCw--.4480S4 X-Coremail-Antispam: 1UD129KBjvdXoWrKw4xKF43CF4UWFy5KF47XFb_yoWDZFcEka 4xKryrWry8JFWF9FWagrWS9ry8A398uryrWr1UtryUua4SqrWfK3yDt34rtr1UZw45Xr48 XrWrAr4fu3ySgjkaLaAFLSUrUUUUjb8apTn2vfkv8UJUUUU8Yxn0WfASr-VFAUDa7-sFnT 9fnUUIcSsGvfJTRUUUbvxFF20E14v26rWj6s0DM7CY07I20VC2zVCF04k26cxKx2IYs7xG 6rWj6s0DM7CIcVAFz4kK6r1j6r18M28IrcIa0xkI8VA2jI8067AKxVWUXwA2048vs2IY02 0Ec7CjxVAFwI0_Xr0E3s1l8cAvFVAK0II2c7xJM28CjxkF64kEwVA0rcxSw2x7M28EF7xv wVC0I7IYx2IY67AKxVW8JVW5JwA2z4x0Y4vE2Ix0cI8IcVCY1x0267AKxVWxJVW8Jr1l84 ACjcxK6I8E87Iv67AKxVW8Jr0_Cr1UM28EF7xvwVC2z280aVCY1x0267AKxVW8Jr0_Cr1U M2AIxVAIcxkEcVAq07x20xvEncxIr21l5I8CrVACY4xI64kE6c02F40Ex7xfMcIj6xIIjx v20xvE14v26r1Y6r17McIj6I8E87Iv67AKxVWUJVW8JwAm72CE4IkC6x0Yz7v_Jr0_Gr1l F7xvr2IYc2Ij64vIr41lF7I21c0EjII2zVCS5cI20VAGYxC7M4IIrI8v6xkF7I0E8cxan2 IY04v7MxkF7I0En4kS14v26r4a6rW5MxAIw28IcxkI7VAKI48JMxC20s026xCaFVCjc4AY 6r1j6r4UMI8I3I0E5I8CrVAFwI0_Jr0_Jr4lx2IqxVCjr7xvwVAFwI0_JrI_JrWlx4CE17 CEb7AF67AKxVW8ZVWrXwCIc40Y0x0EwIxGrwCI42IY6xIIjxv20xvE14v26r1j6r1xMIIF 0xvE2Ix0cI8IcVCY1x0267AKxVWxJVW8Jr1lIxAIcVCF04k26cxKx2IYs7xG6r1j6r1xMI IF0xvEx4A2jsIE14v26r1j6r4UMIIF0xvEx4A2jsIEc7CjxVAFwI0_Gr0_Gr1UYxBIdaVF xhVjvjDU0xZFpf9x0pRGg4-UUUUU= X-CM-SenderInfo: xjdrxt3q6l2u1dvotugofq/1tbiCRIHDGrYx7yXgQAAsP From: Zhiguo Zhu Add the ARCH_ZHIHE option for the Zhihe A210 SoC. Signed-off-by: Zhiguo Zhu Co-developed-by: Han Gao Signed-off-by: Han Gao --- arch/riscv/Kconfig.socs | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs index cecbce0c4983..b9863ebd88c7 100644 --- a/arch/riscv/Kconfig.socs +++ b/arch/riscv/Kconfig.socs @@ -91,6 +91,16 @@ config ARCH_ULTRARISC This enables support for UltraRISC SoC platform hardware, including boards based on the UR-DP1000. +config ARCH_ZHIHE + bool "ZhiHe SoCs" + depends on 64BIT && MMU + select ARCH_HAS_RESET_CONTROLLER + help + Enable support for the Zhihe A210 SoC. + A210 has four C908 and four C920 RISC-V CPU cores. + Supported boards include the Melon Pi V1 and V2. + Say Y here to build a kernel for these boards. + config ARCH_VIRT bool "QEMU Virt Machine" select POWER_RESET -- 2.55.0