From: Conor Dooley <conor@kernel.org>
To: Pinkesh Vaghela <pinkesh.vaghela@einfochips.com>
Cc: Conor Dooley <conor+dt@kernel.org>,
Paul Walmsley <pjw@kernel.org>,
Jonathan Cameron <jic23@kernel.org>,
Samuel Holland <samuel.holland@sifive.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-riscv@lists.infradead.org"
<linux-riscv@lists.infradead.org>,
Darshan Prajapati <darshan.prajapati@einfochips.com>
Subject: Re: [PATCH] cache: sifive_ccache: Enable all ways when no LIM is reserved
Date: Thu, 22 Oct 2026 19:05:18 +0100 [thread overview]
Message-ID: <20261022-chubby-quote-4d06564dc4ba@spud> (raw)
In-Reply-To: <BY5PR04MB70254A39FF5BC39716B23E5783652@BY5PR04MB7025.namprd04.prod.outlook.com>
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On Thu, Oct 22, 2026 at 10:20:47AM +0000, Pinkesh Vaghela wrote:
>
> Hi Conor,
>
> On Wed, Oct 21, 2026 at 10:43 PM +0530, Conor Dooley wrote:
> > On Wed, Oct 21, 2026 at 06:39:06PM +0530, Pinkesh Vaghela wrote:
> > > The composable cache resets with only way 0 enabled, while the
> > > remaining ways are available as Loosely Integrated Memory (LIM).
> > > Systems that do not reserve LIM therefore use only one cache way
> > > unless software increases WayEnable.
> >
> > This is not true in the general case, firmware may intercede to set the ways as
> > it pleases.
> >
> > > When no memory-region property is present, DT describes no LIM
> > > reservation for the cache controller. Validate the reported way count,
> > > then enable all cache ways so Linux can use the full cache capacity.
> > >
> > > When memory-region is present, leave WayEnable unchanged because
> > > enabled ways cannot be returned to LIM until reset. This may leave
> > > more ways assigned to LIM than required, but avoids consuming reserved
> > LIM.
> > >
> > > Apply this policy to all compatibles handled by the driver. Firmware
> > > or
> >
> > I know this is going to cause problems for all the microchip boards, which
> > maybe should have reserved LIM but never did because the LIM was never
> > put in the devicetree as memory in the first place.
> > They also don't suffer from the problem you mention because firmware sets
> > the ways up.
> >
> > > DT configurations that require LIM must provide memory-region;
> > > otherwise, Linux will convert all disabled ways to cache.
> >
> > I don't like this behavioural change, it's never been mandatory to have a
> > reserved memory region for the LIM. I'm only in favour of doing this on
> > devices where we know it is actually required to be done. The eic7700 I
> > assume is one such device.
> >
> > Cheers,
> > Conor.
>
> Thanks for pointing this out.
>
> I agree that firmware may have already configured the cache/LIM
> partition, so applying this behavior generally could overwrite that
> configuration.
>
> EIC7700 firmware does not enable the additional cache ways, leaving
> only way 0 enabled when no LIM is reserved.
>
> I will restrict the change to EIC7700 using a device-specific quirk
> while retaining the memory-region check. Would this approach be
> acceptable?
Seems reasonable to me, yes.
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prev parent reply other threads:[~2026-10-22 18:05 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-21 13:09 Pinkesh Vaghela
2026-10-21 17:13 ` Conor Dooley
2026-10-22 10:20 ` Pinkesh Vaghela
2026-10-22 18:05 ` Conor Dooley [this message]
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