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From: Konrad Dybcio <konradybcio@kernel.org>
To: Thomas Gleixner <tglx@kernel.org>, Radu Rendec <radu@rendec.net>,
	 Stephen Boyd <swboyd@chromium.org>,
	Marc Zyngier <maz@kernel.org>,  Lina Iyer <ilina@codeaurora.org>
Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
	 Abel Vesa <abel.vesa@oss.qualcomm.com>,
	 Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Subject: [PATCH] irqchip/qcom-pdc: Handle ESPIs in qcom,pdc-ranges
Date: Thu, 22 Oct 2026 10:44:02 +0200	[thread overview]
Message-ID: <20261022-topic-pdc_map_espi-v1-1-7c481a42bac5@oss.qualcomm.com> (raw)

From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>

The qcom,pdc-ranges property maps GIC interrupts to PDC output pins.
That data is then subsequently used by irq_domain to resolve into the
interrupt parent (which again, is always GIC).

The code that handles this hardcodes parent_fwspec.param[0] = 0
(GIC_SPI). Make that conditional to prevent this warning at boot:

GICv3: SPI 4115 out of range (use ESPI?)"

Fixes: 81ef8bf88065 ("irqchip/qcom-pdc: Add irqdomain for wakeup capable GPIOs")
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
---
 drivers/irqchip/qcom-pdc.c | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/drivers/irqchip/qcom-pdc.c b/drivers/irqchip/qcom-pdc.c
index 29025a212ece..bf4951dfa0a6 100644
--- a/drivers/irqchip/qcom-pdc.c
+++ b/drivers/irqchip/qcom-pdc.c
@@ -9,6 +9,7 @@
 #include <linux/interrupt.h>
 #include <linux/irq.h>
 #include <linux/irqchip.h>
+#include <linux/irqchip/arm-gic-v3.h>
 #include <linux/irqdomain.h>
 #include <linux/io.h>
 #include <linux/kernel.h>
@@ -21,6 +22,7 @@
 #include <linux/slab.h>
 #include <linux/types.h>
 #include <linux/firmware/qcom/qcom_scm.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
 
 #define PDC_MAX_IRQS			256
 #define IRQ_ENABLE_BANK_MAX		BITS_TO_BYTES(PDC_MAX_IRQS)
@@ -597,8 +599,13 @@ static int qcom_pdc_alloc(struct irq_domain *domain, unsigned int virq,
 
 	parent_fwspec.fwnode      = domain->parent->fwnode;
 	parent_fwspec.param_count = 3;
-	parent_fwspec.param[0]    = 0;
-	parent_fwspec.param[1]    = pin_to_hwirq(region, hwirq);
+	if (pin_to_hwirq(region, hwirq) >= ESPI_BASE_INTID) {
+		parent_fwspec.param[0] = GIC_ESPI;
+		parent_fwspec.param[1] = pin_to_hwirq(region, hwirq) - ESPI_BASE_INTID;
+	} else {
+		parent_fwspec.param[0] = GIC_SPI;
+		parent_fwspec.param[1] = pin_to_hwirq(region, hwirq);
+	}
 	parent_fwspec.param[2]    = type;
 
 	return irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, &parent_fwspec);

---
base-commit: 2efb7a11f1aa4d2dc285fe2680cca22cb9f72f64
change-id: 20261022-topic-pdc_map_espi-43d4300dd856

Best regards,
--  
Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>


                 reply	other threads:[~2026-10-22  8:44 UTC|newest]

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