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Hermes SMTP Server) with ESMTPA ID aade7a6eefc81e54893ba8797da94197; Thu, 22 Oct 2026 00:00:39 +0000 (UTC) From: Jeremy Dean Clifton To: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Jeremy Dean Clifton Subject: [PATCH v4] dt-bindings: pwm: Convert NXP PCA9685 PWM controller to DT schema Date: Thu, 22 Oct 2026 00:00:28 +0000 Message-ID: <20261022000029.125691-1-deaner92@yahoo.com> X-Mailer: git-send-email 2.43.0 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit References: <20261022000029.125691-1-deaner92.ref@yahoo.com> Convert the NXP PCA9685 PWM controller binding to DT schema format. Changes from the text binding: Document the 'reg' property and make it required. It was missing from the text binding, although the example used it and the device cannot work without the I2C address. Rename the example node to the generic 'pwm', as required by pwm.yaml. Describe both cells of the PWM specifier, and state that 'invert' and 'open-drain' apply to all outputs, as per the datasheet (INVRT and OUTDRV bits in MODE2). Reviewed-by: Rob Herring (Arm) Signed-off-by: Jeremy Dean Clifton --- Changes in v4: - List Uwe Kleine-König as maintainer instead of me, as he requested: https://lore.kernel.org/all/athTVpsanlK9_mVJ@monoceros/ - Add Rob's Reviewed-by. - Rebase onto next-20261021. - Drop the Assisted-by tag, which checkpatch no longer accepts in this form; the AI assistance is disclosed below. v3: https://lore.kernel.org/all/20261012140346.3065-1-deaner92@yahoo.com/ v2: https://lore.kernel.org/all/20261009211523.56122-1-deaner92@yahoo.com/ v1: https://lore.kernel.org/all/20261006033518.34332-1-deaner92@yahoo.com/ The schema and commit message were drafted with an AI assistant. I verified each property against the driver source and the PCA9685 datasheet, and the binding passes make dt_binding_check. .../bindings/pwm/nxp,pca9685-pwm.txt | 27 -------- .../bindings/pwm/nxp,pca9685-pwm.yaml | 62 +++++++++++++++++++ 2 files changed, 62 insertions(+), 27 deletions(-) delete mode 100644 Documentation/devicetree/bindings/pwm/nxp,pca9685-pwm.txt create mode 100644 Documentation/devicetree/bindings/pwm/nxp,pca9685-pwm.yaml diff --git a/Documentation/devicetree/bindings/pwm/nxp,pca9685-pwm.txt b/Documentation/devicetree/bindings/pwm/nxp,pca9685-pwm.txt deleted file mode 100644 index f21b55c95738..000000000000 --- a/Documentation/devicetree/bindings/pwm/nxp,pca9685-pwm.txt +++ /dev/null @@ -1,27 +0,0 @@ -NXP PCA9685 16-channel 12-bit PWM LED controller -================================================ - -Required properties: - - compatible: "nxp,pca9685-pwm" - - #pwm-cells: Should be 2. See pwm.yaml in this directory for a description of - the cells format. - The index 16 is the ALLCALL channel, that sets all PWM channels at the same - time. - -Optional properties: - - invert (bool): boolean to enable inverted logic - - open-drain (bool): boolean to configure outputs with open-drain structure; - if omitted use totem-pole structure - -Example: - -For LEDs that are directly connected to the PCA, the following setting is -applicable: - -pca: pca@41 { - compatible = "nxp,pca9685-pwm"; - #pwm-cells = <2>; - reg = <0x41>; - invert; - open-drain; -}; diff --git a/Documentation/devicetree/bindings/pwm/nxp,pca9685-pwm.yaml b/Documentation/devicetree/bindings/pwm/nxp,pca9685-pwm.yaml new file mode 100644 index 000000000000..4c60f4260922 --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/nxp,pca9685-pwm.yaml @@ -0,0 +1,62 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pwm/nxp,pca9685-pwm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP PCA9685 16-channel 12-bit PWM LED controller + +maintainers: + - Uwe Kleine-König + +allOf: + - $ref: pwm.yaml# + +properties: + compatible: + const: nxp,pca9685-pwm + + reg: + maxItems: 1 + + "#pwm-cells": + const: 2 + description: + The first cell is the PWM channel index, from 0 to 15, or 16 for the + ALLCALL channel, which sets all PWM channels at the same time. The + second cell is the PWM period in nanoseconds. + + invert: + type: boolean + description: + Invert the logic state of all outputs (INVRT bit in the MODE2 + register). The setting applies to the whole chip, not to individual + channels, and is typically used when the outputs drive an external + driver stage. + + open-drain: + type: boolean + description: + Configure all outputs with an open-drain structure (OUTDRV bit in the + MODE2 register). If omitted, the outputs use a totem-pole structure. + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + pwm@41 { + compatible = "nxp,pca9685-pwm"; + reg = <0x41>; + #pwm-cells = <2>; + invert; + open-drain; + }; + }; base-commit: 9a482184d910775cf648863148944945b74e2815 -- 2.43.0