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[2a02:3100:ad43:d501:2c28:bb72:120d:420e]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4a1fd0f4427sm90362275e9.3.2026.10.21.22.17.38 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 21 Oct 2026 22:17:41 -0700 (PDT) From: Karl Mehltretter To: Steven Rostedt , Peter Zijlstra , Thomas Gleixner Cc: Karl Mehltretter , Catalin Marinas , Will Deacon , Mark Rutland , Ingo Molnar , Andy Lutomirski , Frederic Weisbecker , "Paul E . McKenney" , Sebastian Andrzej Siewior , Boqun Feng , Waiman Long , Juri Lelli , Vincent Guittot , Dietmar Eggemann , Ben Segall , Mel Gorman , Valentin Schneider , K Prateek Nayak , Hongyan Xia , Jonathan Corbet , Shuah Khan , Randy Dunlap , Andrew Morton , Nathan Chancellor , Nick Desaulniers , Bill Wendling , Justin Stitt , linux-arm-kernel@lists.infradead.org, linux-trace-kernel@vger.kernel.org, linux-rt-devel@lists.linux.dev, linux-doc@vger.kernel.org, llvm@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [RFC PATCH 09/12] arm64: Use the pre-counted hardirq lifecycle Date: Thu, 22 Oct 2026 07:16:51 +0200 Message-Id: <20261022051654.79224-10-kmehltretter@gmail.com> X-Mailer: git-send-email 2.39.5 (Apple Git-154) In-Reply-To: <20261022051654.79224-1-kmehltretter@gmail.com> References: <20261022051654.79224-1-kmehltretter@gmail.com> X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Ordinary EL0 and EL1 interrupt paths establish generic entry state before irq_enter_rcu() adds HARDIRQ_OFFSET and lockdep nesting. Callbacks in that early window are therefore not classified as hardirq work. Their exit paths also drop the classification before function-graph return callbacks and the kernel return tail have completed. After the EL1 pseudo-NMI decision, enter ordinary interrupts through irqentry_hardirq_enter(). Complete delayed timer and accounting work with irq_enter_rcu_preempt_counted(). Use the retained exit preparation followed immediately by raw count and lockdep teardown. For kernel returns, restore return-tail classification after masking DAIF and before MTE exit tracing. Keep the pseudo-NMI lifecycle unchanged. Force arm64 preempt_count() inline so noinstr callers cannot be outlined into instrumentable text. The noinstr path also depends on the raw preempt-count and __kern_my_cpu_offset() inlining changes carried as patches 1 and 2. Keep them separate because they are externally authored fixes. Link: https://lore.kernel.org/all/c3a90368dd6c096af9d918e036a27728696fb8a4.1786603168.git.hongyan.xia@transsion.com/ Link: https://lore.kernel.org/r/20260918161407.2300-12-will@kernel.org Assisted-by: LLM --- arch/arm64/include/asm/preempt.h | 2 +- arch/arm64/kernel/entry-common.c | 23 +++++++++++++++++------ 2 files changed, 18 insertions(+), 7 deletions(-) diff --git a/arch/arm64/include/asm/preempt.h b/arch/arm64/include/asm/preempt.h index 4f917596f387d..3d61be0f825fb 100644 --- a/arch/arm64/include/asm/preempt.h +++ b/arch/arm64/include/asm/preempt.h @@ -7,7 +7,7 @@ #define PREEMPT_NEED_RESCHED BIT(32) #define PREEMPT_ENABLED (PREEMPT_NEED_RESCHED) -static inline int preempt_count(void) +static __always_inline int preempt_count(void) { return READ_ONCE(current_thread_info()->preempt.count); } diff --git a/arch/arm64/kernel/entry-common.c b/arch/arm64/kernel/entry-common.c index 93056a766fb20..fda807c61ff27 100644 --- a/arch/arm64/kernel/entry-common.c +++ b/arch/arm64/kernel/entry-common.c @@ -56,6 +56,8 @@ static void noinstr __arm64_exit_to_kernel_mode(struct pt_regs *regs, irqentry_state_t state) { local_daif_mask(); + /* arm64 uses the split exit API, so enter the tail before MTE tracing. */ + irqentry_hardirq_tail_enter(state); mte_check_tfsr_exit(); irqentry_exit_to_kernel_mode_after_preempt(regs, state); } @@ -523,12 +525,16 @@ static __always_inline void __el1_irq(struct pt_regs *regs, void (*handler)(struct pt_regs *)) { irqentry_state_t state; + bool do_sub; - state = arm64_enter_from_kernel_mode(regs); + state = irqentry_hardirq_enter(regs); + mte_check_tfsr_entry(); + mte_disable_tco_entry(current); - irq_enter_rcu(); + irq_enter_rcu_preempt_counted(); do_interrupt_handler(regs, handler); - irq_exit_rcu(); + do_sub = irq_exit_rcu_preempt_counted_prepare(); + irqentry_hardirq_exit_finish(do_sub); arm64_exit_to_kernel_mode_preempt(regs, state); } @@ -839,16 +845,21 @@ asmlinkage void noinstr el0t_64_sync_handler(struct pt_regs *regs) static void noinstr el0_interrupt(struct pt_regs *regs, void (*handler)(struct pt_regs *)) { - arm64_enter_from_user_mode(regs); + bool do_sub; + + (void)irqentry_hardirq_enter(regs); + mte_disable_tco_entry(current); + sme_enter_from_user_mode(); write_sysreg(DAIF_PROCCTX_NOIRQ, daif); if (regs->pc & BIT(55)) arm64_apply_bp_hardening(); - irq_enter_rcu(); + irq_enter_rcu_preempt_counted(); do_interrupt_handler(regs, handler); - irq_exit_rcu(); + do_sub = irq_exit_rcu_preempt_counted_prepare(); + irqentry_hardirq_exit_finish(do_sub); arm64_exit_to_user_mode(regs); } -- 2.39.5 (Apple Git-154)