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Thu, 22 Oct 2026 09:50:09 -0700 (PDT) Received: from DESKTOP-NM9EKIA ([125.134.240.130]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3ada48bb3b6sm5160804a91.13.2026.10.22.09.50.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Oct 2026 09:50:07 -0700 (PDT) From: Joonhoe Kim <26rote@gmail.com> To: mani@kernel.org, mkp@kernel.org Cc: James.Bottomley@HansenPartnership.com, bvanassche@acm.org, linux-arm-msm@vger.kernel.org, linux-scsi@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH] scsi: ufs: qcom: Reprogram ESI after a host controller reset Date: Fri, 23 Oct 2026 01:50:06 +0900 Message-ID: <20261022165006.1275-1-26rote@gmail.com> X-Mailer: git-send-email 2.55.0.windows.5 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit ufs_qcom_config_esi() returns early once the ESI interrupts are set up. ufshcd_config_mcq() also calls it after every host controller reset, which clears the ESI base address, the vector mask and ESI enable. After the error handler has reset the controller, the completions then arrive only on the legacy interrupt while mcq_esi_enabled stays set. Allocate the MSIs and request their interrupts only once, but program the ESI registers on every call. The MSI message is not cached for platform MSIs, so keep the one written at allocation. Fixes: 519b6274a777 ("scsi: ufs: qcom: Add MCQ ESI config vendor specific ops") Signed-off-by: Joonhoe Kim <26rote@gmail.com> --- Tested on a Lenovo Y700 Gen 5 (TB323FU, Kaanapali; out-of-tree board support) on v7.3-rc4 with commit b52d695d0620 ("scsi: ufs: core: Keep internal commands dispatchable during error handling") applied, forcing a full reset through the debugfs saved_err file: before, REG_UFS_MEM_CFG, ESILBA and ESIUBA read 0 after the reset and all completions came on the legacy interrupt; with this patch they come on the ESI interrupts again. drivers/ufs/host/ufs-qcom.c | 12 +++++++++--- drivers/ufs/host/ufs-qcom.h | 2 ++ 2 files changed, 11 insertions(+), 3 deletions(-) diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c index fee9b54ba5e1..ea2a106cbe26 100644 --- a/drivers/ufs/host/ufs-qcom.c +++ b/drivers/ufs/host/ufs-qcom.c @@ -2414,7 +2414,9 @@ static void ufs_qcom_write_msi_msg(struct msi_desc *desc, struct msi_msg *msg) { struct device *dev = msi_desc_to_dev(desc); struct ufs_hba *hba = dev_get_drvdata(dev); + struct ufs_qcom_host *host = ufshcd_get_variant(hba); + host->esi_msg = *msg; ufshcd_mcq_config_esi(hba, msg); } @@ -2442,8 +2444,10 @@ static int ufs_qcom_config_esi(struct ufs_hba *hba) struct ufs_qcom_irq *qi; int nr_irqs, ret; - if (host->esi_enabled) - return 0; + if (host->esi_enabled) { + ufshcd_mcq_config_esi(hba, &host->esi_msg); + goto enable; + } /* * 1. We only handle CQs as of now. @@ -2481,12 +2485,14 @@ static int ufs_qcom_config_esi(struct ufs_hba *hba) } } + host->esi_enabled = true; + +enable: if (host->hw_ver.major >= 6) { ufshcd_rmwl(hba, ESI_VEC_MASK, FIELD_PREP(ESI_VEC_MASK, MAX_ESI_VEC - 1), REG_UFS_CFG3); } ufshcd_mcq_enable_esi(hba); - host->esi_enabled = true; return 0; } diff --git a/drivers/ufs/host/ufs-qcom.h b/drivers/ufs/host/ufs-qcom.h index 944b2e532a09..d2647695abe3 100644 --- a/drivers/ufs/host/ufs-qcom.h +++ b/drivers/ufs/host/ufs-qcom.h @@ -5,6 +5,7 @@ #ifndef UFS_QCOM_H_ #define UFS_QCOM_H_ +#include #include #include #include @@ -360,6 +361,7 @@ struct ufs_qcom_host { u32 phy_gear; bool esi_enabled; + struct msi_msg esi_msg; u32 saved_tx_eq_g1_setting; u32 boot_spare_cfg; base-commit: 2efb7a11f1aa4d2dc285fe2680cca22cb9f72f64 -- 2.43.0