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Signed-off-by: Frank Li --- change in v4 - delete adma_lcdif and lcd_clk_lpcg (sashiko AI) --- arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi | 29 ++++++++++++++++++++++ arch/arm64/boot/dts/freescale/imx8dxl-ss-adma.dtsi | 11 ++++++++ arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi | 2 ++ 3 files changed, 42 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi index 4de78f870c05c..87082c3fa9338 100644 --- a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi @@ -149,6 +149,24 @@ lpuart3: serial@5a090000 { status = "disabled"; }; + adma_lcdif: lcdif@5a180000 { + compatible = "fsl,imx8qxp-lcdif", "fsl,imx6sx-lcdif"; + reg = <0x5a180000 0x10000>; + clocks = <&lcd_clk_lpcg IMX_LPCG_CLK_0>, + <&lcd_clk_lpcg IMX_LPCG_CLK_4>, + <&clk IMX_SC_R_LCD_0 IMX_SC_PM_CLK_MISC0>; + clock-names = "pix", "axi", "disp_axi"; + assigned-clocks = <&clk IMX_SC_R_LCD_0 IMX_SC_PM_CLK_PER>, + <&clk IMX_SC_R_LCD_0 IMX_SC_PM_CLK_MISC0>, + <&clk IMX_SC_R_ELCDIF_PLL IMX_SC_PM_CLK_PLL>; + assigned-clock-parents = <&clk IMX_SC_R_ELCDIF_PLL IMX_SC_PM_CLK_PLL>, + <&clk IMX_SC_R_LCD_0 IMX_SC_PM_CLK_BYPASS>; + assigned-clock-rates = <0>, <24000000>, <804000000>; + interrupts = ; + power-domains = <&pd IMX_SC_R_LCD_0>; + status = "disabled"; + }; + adma_pwm: pwm@5a190000 { compatible = "fsl,imx8qxp-pwm", "fsl,imx27-pwm"; reg = <0x5a190000 0x1000>; @@ -298,6 +316,17 @@ uart3_lpcg: clock-controller@5a490000 { power-domains = <&pd IMX_SC_R_UART_3>; }; + lcd_clk_lpcg: clock-controller@5a580000 { + compatible = "fsl,imx8qxp-lpcg"; + reg = <0x5a580000 0x4>; + #clock-cells = <1>; + clocks = <&clk IMX_SC_R_LCD_0 IMX_SC_PM_CLK_PER>, + <&dma_ipg_clk>; + clock-indices = , ; + clock-output-names = "lcd_clk_lpcg", "lcd_ipg_clk"; + power-domains = <&pd IMX_SC_R_LCD_0>; + }; + adma_pwm_lpcg: clock-controller@5a590000 { compatible = "fsl,imx8qxp-lpcg"; reg = <0x5a590000 0x10000>; diff --git a/arch/arm64/boot/dts/freescale/imx8dxl-ss-adma.dtsi b/arch/arm64/boot/dts/freescale/imx8dxl-ss-adma.dtsi index 7a191195dbd97..febf5f8b54ac4 100644 --- a/arch/arm64/boot/dts/freescale/imx8dxl-ss-adma.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8dxl-ss-adma.dtsi @@ -60,6 +60,17 @@ &acm { "sai3_rx_bclk"; }; +&adma_lcdif { + compatible = "fsl,imx8dxl-lcdif", "fsl,imx6sx-lcdif"; + assigned-clocks = <&clk IMX_SC_R_LCD_0 IMX_SC_PM_CLK_PER>, + <&clk IMX_SC_R_LCD_0 IMX_SC_PM_CLK_MISC0>, + <&clk IMX_SC_R_ELCDIF_PLL IMX_SC_PM_CLK_PLL>; + assigned-clock-parents = <&clk IMX_SC_R_ELCDIF_PLL IMX_SC_PM_CLK_PLL>, + <&clk IMX_SC_R_LCD_0 IMX_SC_PM_CLK_BYPASS>; + assigned-clock-rates = <0>, <24000000>, <711000000>; + interrupts = ; +}; + &audio_ipg_clk { clock-frequency = <160000000>; }; diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi index 738c6f05c4ea6..7ecb3be730b2f 100644 --- a/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi @@ -6,6 +6,8 @@ /delete-node/ &adma_pwm; /delete-node/ &adma_pwm_lpcg; +/delete-node/ &adma_lcdif; +/delete-node/ &lcd_clk_lpcg; &dma_subsys { lpuart4: serial@5a0a0000 { -- 2.43.0