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[103.229.18.19]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-cd8ba8a6dcdsm399751a12.18.2026.10.23.00.02.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 23 Oct 2026 00:02:13 -0700 (PDT) From: Aaradhana Sahu Date: Fri, 23 Oct 2026 12:31:17 +0530 Subject: [PATCH ath-next v3 14/17] wifi: ath12k: store and use MSI data per CE and DP interrupt group for QCN6432 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20261023-mpp-bringup-v3-14-19f3fcbf7b5f@oss.qualcomm.com> References: <20261023-mpp-bringup-v3-0-19f3fcbf7b5f@oss.qualcomm.com> In-Reply-To: <20261023-mpp-bringup-v3-0-19f3fcbf7b5f@oss.qualcomm.com> To: Johannes Berg , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jeff Johnson Cc: linux-wireless@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, ath12k@lists.infradead.org, Sowmiya Sree Elavalagan , Aaradhana Sahu X-Mailer: b4 0.15.2 X-Proofpoint-GUID: Uyorv8GD4RY1UbIF2vsFg7aY2SWNSYNk X-Proofpoint-ORIG-GUID: Uyorv8GD4RY1UbIF2vsFg7aY2SWNSYNk X-Authority-Analysis: v=2.4 cv=dphOmFg4 c=1 sm=1 tr=0 ts=6adb0677 cx=c_pps a=MTSHoo12Qbhz2p7MsH1ifg==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17 a=IkcTkHD0fZMA:10 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=gowsoOTTUOVcmtlkKump:22 a=COk6AnOGAAAA:8 a=EUspDBNiAAAA:8 a=JOiqKhmsGJDeROXOrEsA:9 a=QEXdDO2ut3YA:10 a=GvdueXVYPmCkWapjIL-Q:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-Spam-Info: AW1haW4tMjYxMDIzMDAyNyBTYWx0ZWRfX30KjKv68eWTf EZGA3CPKO/DN6zshz6YH3GHe6t4lQ8ENpRTlMZ+8Aeyg+NcWc2K0gAbbkKiLa0yZwkTJM6g3RhZ hs4h3krWhEHj/m/OPA/GCTmEcFO9VnA= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDIzMDAyNyBTYWx0ZWRfX4XIKE1r5tBWP nNMY0yq8W95trPSyflIYXWS2G6Tmg7mOOMLm+/h6nJ+zh/vauNJbMKcb0bIOo3c6TSd92N6t+An aHiy4s3jfgeY7jxfHOJ0Ga6o7boG6yGqVFjz9Bolx6C1MhgrUigyrDx17ikI/EAl1A+IWr0TT6G 0rc+cgvfCiJJhlfRAyip3AVibbuTLJI79vrb6ck3pDGH8Spx0qNEfEWVYxQBJdNs+UeP1yx5UIB 1qARfhczm1HAN2nJpBO6dNKzrw8Fpk/mhL+S3PZYjYDufUl5R3jC70WUDN4tUuu2hWz008wLZ0F sk9LWz8RkgwWcKfVcoN0xUsZdeCHLZfzJlwfUMdOSNiPPwv6pRSWsQy6uNrZN0uZsCcekhAlAmQ zOzekaWRPb5PE8m44LCjJcoUjLTCqfL19PVn8FsISVffF0z2n9H5Uj/pyX9m1QRn1w/vX3FBWRn Vm6fngyDgV6X7FhKIeA== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.138,FMLib:17.12.100.49 definitions=2026-10-23_01,2026-10-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 spamscore=0 clxscore=1015 impostorscore=0 adultscore=0 lowpriorityscore=0 priorityscore=1501 suspectscore=0 phishscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610190000 definitions=main-2610230027 From: Sowmiya Sree Elavalagan Store MSI data values for each interrupt vector during configuration and use them for ring setup on hybrid devices. Hybrid devices require explicit MSI data values rather than calculated offsets. Add ce_msi_data and dp_msi_data arrays to store values captured from MSI descriptors. Use stored values for ring configuration on QCN6432, ensuring hardware uses exact platform MSI allocated values. Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.6-01243-QCAHKSWPL_SILICONZ-1 Tested-on: IPQ5332 hw1.0 AHB WLAN.WBE.1.6-01322-QCAHKSWPL_SILICONZ-1 Tested-on: QCN6432 hw1.0 AHB WLAN.WBE.1.6-01322-QCAHKSWPL_SILICONZ-1 Signed-off-by: Sowmiya Sree Elavalagan Co-developed-by: Aaradhana Sahu Signed-off-by: Aaradhana Sahu --- drivers/net/wireless/ath/ath12k/ce.c | 7 ++++++- drivers/net/wireless/ath/ath12k/core.h | 2 ++ drivers/net/wireless/ath/ath12k/dp.c | 9 +++++++-- drivers/net/wireless/ath/ath12k/pcic.c | 2 ++ 4 files changed, 17 insertions(+), 3 deletions(-) diff --git a/drivers/net/wireless/ath/ath12k/ce.c b/drivers/net/wireless/ath/ath12k/ce.c index c99e915e3885..cc8ed8451a2f 100644 --- a/drivers/net/wireless/ath/ath12k/ce.c +++ b/drivers/net/wireless/ath/ath12k/ce.c @@ -270,7 +270,12 @@ static void ath12k_ce_srng_msi_ring_params_setup(struct ath12k_base *ab, u32 ce_ ring_params->msi_addr = addr_lo; ring_params->msi_addr |= (dma_addr_t)(((u64)addr_hi) << 32); - ring_params->msi_data = (msi_data_idx % msi_data_count) + msi_data_start; + + if (ab->hw_params->hybrid_bus_type) + ring_params->msi_data = ab->msi.ce_msi_data[ce_id]; + else + ring_params->msi_data = (msi_data_idx % msi_data_count) + msi_data_start; + ring_params->flags |= HAL_SRNG_FLAGS_MSI_INTR; } diff --git a/drivers/net/wireless/ath/ath12k/core.h b/drivers/net/wireless/ath/ath12k/core.h index bbbde9f05ea9..575139555dd7 100644 --- a/drivers/net/wireless/ath/ath12k/core.h +++ b/drivers/net/wireless/ath/ath12k/core.h @@ -1172,6 +1172,8 @@ struct ath12k_base { u32 ep_base_data; u32 addr_lo; u32 addr_hi; + u32 ce_msi_data[CE_COUNT_MAX]; + u32 dp_msi_data[ATH12K_EXT_IRQ_GRP_NUM_MAX]; } msi; /* must be last */ diff --git a/drivers/net/wireless/ath/ath12k/dp.c b/drivers/net/wireless/ath/ath12k/dp.c index 6cf254b2d2a7..0f0800388935 100644 --- a/drivers/net/wireless/ath/ath12k/dp.c +++ b/drivers/net/wireless/ath/ath12k/dp.c @@ -225,8 +225,13 @@ static void ath12k_dp_srng_msi_setup(struct ath12k_base *ab, ring_params->msi_addr = addr_lo; ring_params->msi_addr |= (dma_addr_t)(((u64)addr_hi) << 32); - ring_params->msi_data = (msi_group_number % msi_data_count) - + msi_data_start; + + if (ab->hw_params->hybrid_bus_type) + ring_params->msi_data = ab->msi.dp_msi_data[msi_group_number]; + else + ring_params->msi_data = (msi_group_number % msi_data_count) + + msi_data_start; + ring_params->flags |= HAL_SRNG_FLAGS_MSI_INTR; } diff --git a/drivers/net/wireless/ath/ath12k/pcic.c b/drivers/net/wireless/ath/ath12k/pcic.c index 13097cdf2794..b6d306fd3b99 100644 --- a/drivers/net/wireless/ath/ath12k/pcic.c +++ b/drivers/net/wireless/ath/ath12k/pcic.c @@ -275,6 +275,7 @@ static int ath12k_pcic_ext_irq_config(struct ath12k_base *ab, } ab->irq_num[irq_idx] = desc->irq; + ab->msi.dp_msi_data[i] = desc->msg.data; disable_irq_nosync(ab->irq_num[irq_idx]); } @@ -318,6 +319,7 @@ static int ath12k_pcic_ce_irq_config(struct ath12k_base *ab, } ab->irq_num[irq_idx] = desc->irq; + ab->msi.ce_msi_data[i] = desc->msg.data; ath12k_pcic_ce_irq_disable(ab, i); vec_idx = (vec_idx + 1) % num_msi; -- 2.34.1