Re: [PATCH v2 3/3] PCI: tegra194: Notify Endpoint functions on PERST# assert

[kernel test robot <lkp@intel.com>]

Hi Manikanta,

kernel test robot noticed the following build errors:

[auto build test ERROR on pci/next]
[also build test ERROR on pci/for-linus linus/master v7.3 next-20261022]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Manikanta-Maddireddy/PCI-dwc-Reuse-Endpoint-resources-after-fundamental-reset/20261021-114901
base:   https://git.kernel.org/pub/scm/linux/kernel/git/pci/pci.git next
patch link:    https://lore.kernel.org/r/20261021061903.1269605-4-mmaddireddy%40nvidia.com
patch subject: [PATCH v2 3/3] PCI: tegra194: Notify Endpoint functions on PERST# assert
config: xtensa-randconfig-1001-20261022 (https://download.01.org/0day-ci/archive/20261023/202610230923.2lf3BsLs-lkp@intel.com/config)
compiler: xtensa-linux-gcc (GCC) 15.3.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20261023/202610230923.2lf3BsLs-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202610230923.2lf3BsLs-lkp@intel.com/

All errors (new ones prefixed by >>):

   drivers/pci/controller/dwc/pcie-tegra194.c: In function 'pex_ep_event_pex_rst_assert':
>> drivers/pci/controller/dwc/pcie-tegra194.c:1708:9: error: implicit declaration of function 'pci_epc_linkdown'; did you mean 'dw_pcie_ep_linkdown'? [-Wimplicit-function-declaration]
    1708 |         pci_epc_linkdown(pcie->pci.ep.epc);
         |         ^~~~~~~~~~~~~~~~
         |         dw_pcie_ep_linkdown


vim +1708 drivers/pci/controller/dwc/pcie-tegra194.c

  1688	
  1689	static void pex_ep_event_pex_rst_assert(struct tegra_pcie_dw *pcie)
  1690	{
  1691		u32 val;
  1692		int ret;
  1693	
  1694		if (pcie->ep_state == EP_STATE_DISABLED)
  1695			return;
  1696	
  1697		ret = readl_poll_timeout(pcie->appl_base + APPL_DEBUG, val,
  1698			((val & APPL_DEBUG_LTSSM_STATE_MASK) == LTSSM_STATE_DETECT_QUIET) ||
  1699			((val & APPL_DEBUG_LTSSM_STATE_MASK) == LTSSM_STATE_DETECT_ACT) ||
  1700			((val & APPL_DEBUG_LTSSM_STATE_MASK) == LTSSM_STATE_PRE_DETECT_QUIET) ||
  1701			((val & APPL_DEBUG_LTSSM_STATE_MASK) == LTSSM_STATE_DETECT_WAIT) ||
  1702			((val & APPL_DEBUG_LTSSM_STATE_MASK) == LTSSM_STATE_L2_IDLE),
  1703			LTSSM_DELAY_US, LTSSM_TIMEOUT_US);
  1704		if (ret)
  1705			dev_info(pcie->dev, "LTSSM state: 0x%x detect timeout: %d\n", val, ret);
  1706	
  1707		/* Avoid the DBI register reinitialization in dw_pcie_ep_linkdown(). */
> 1708		pci_epc_linkdown(pcie->pci.ep.epc);
  1709	
  1710		/*
  1711		 * Deassert LTSSM state to stop the state toggling between
  1712		 * Polling and Detect.
  1713		 */
  1714		val = appl_readl(pcie, APPL_CTRL);
  1715		val &= ~APPL_CTRL_LTSSM_EN;
  1716		appl_writel(pcie, val, APPL_CTRL);
  1717	
  1718		reset_control_assert(pcie->core_rst);
  1719	
  1720		tegra_pcie_disable_phy(pcie);
  1721	
  1722		reset_control_assert(pcie->core_apb_rst);
  1723	
  1724		clk_disable_unprepare(pcie->core_clk);
  1725	
  1726		pm_runtime_put_sync(pcie->dev);
  1727	
  1728		if (pcie->enable_ext_refclk) {
  1729			ret = tegra_pcie_bpmp_set_pll_state(pcie, false);
  1730			if (ret)
  1731				dev_err(pcie->dev, "Failed to turn off UPHY: %d\n",
  1732					ret);
  1733		}
  1734	
  1735		ret = tegra_pcie_bpmp_set_ctrl_state(pcie, false);
  1736		if (ret)
  1737			dev_err(pcie->dev, "Failed to disable controller: %d\n", ret);
  1738	
  1739		pcie->ep_state = EP_STATE_DISABLED;
  1740		dev_dbg(pcie->dev, "Uninitialization of endpoint is completed\n");
  1741	}
  1742	

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