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Fri, 23 Oct 2026 13:16:54 +0000 (GMT) Received: from li-7bb28a4c-2dab-11b2-a85c-887b5c60d769.ibm.com.com (unknown [9.39.19.68]) by smtpav04.fra02v.mail.ibm.com (Postfix) with ESMTP; Fri, 23 Oct 2026 13:16:53 +0000 (GMT) From: Shrikanth Hegde To: maddy@linux.ibm.com, linuxppc-dev@lists.ozlabs.org, peterz@infradead.org, tim.c.chen@linux.intel.com Cc: sshegde@linux.ibm.com, christophe.leroy@csgroup.eu, linux-kernel@vger.kernel.org, ritesh.list@gmail.com, kprateek.nayak@amd.com, yu.c.chen@intel.com, vineethr@linux.ibm.com, vincent.guittot@linaro.org, srikar@linux.ibm.com, npiggin@gmail.com, mpe@ellerman.id.au Subject: [PATCH v2 1/4] powerpc/topology: Introduce llc_override kernel parameter Date: Fri, 23 Oct 2026 18:46:43 +0530 Message-ID: <20261023131646.2907938-2-sshegde@linux.ibm.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20261023131646.2907938-1-sshegde@linux.ibm.com> References: <20261023131646.2907938-1-sshegde@linux.ibm.com> X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-TM-AS-GCONF: 00 X-Proofpoint-Reinject: loops=2 maxloops=12 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDIzMDA1MSBTYWx0ZWRfX8oUL74Lj7UaP P+kUHr0Sp+x0QjsbBD4aUu3VPyA2SnlPhLTdzZUtoGxx0n2NfXbyE2WE26Syl2udxc9DNTA/Puh xDxWmMt221pfrzGYk2Q/LBI/q4ro9cv52VLFZbKSDJsBdQHUEHrvvuGjBu1AE5D0AdkVOb194+U 5wS4KoF94euA5CIHkJAsJd+pnDOUjG8x1SuB4IPAraORVcDRTCWJHKrJL0eIwSu74/pmhFFBaYG rmpZ5n/4/2CEH8jaV91AClm6C0L/tfsb3UTK6mUS3IHm5pGhx+Dhk2K3pOd0/hYJbNrd7kxmeWh X3GldhIxef2TJn+2O3EW0FRe1oICN3+578SyHpGTIAnTPJU3D3fmQMjusx+y27CPnGE6CXb6nm9 q25CHvTBnsVexrx0z+tTyubk8/VwXqjRTrMih0n/DgdjQ1uaOkWeQ9VUhTNRYYDm7RbcUmd1KyU 8YlAMsLH/vo2ATgzPeQ== X-Proofpoint-ORIG-GUID: H4xSTqwBafoehc2VgUB9Z2gbzDesihyC X-Proofpoint-GUID: AiUrep1QrU2uQQtPuMS85sRX2eX0Yf_k X-Proofpoint-Spam-Info: AW1haW4tMjYxMDIzMDA1MSBTYWx0ZWRfX9jEg8Igfc/9P c142fAXdYJFakQbAdNRNMXlg9LWigB668z5j92+8DYha2C/SVxrFOs9lUZMMj+L9hFODJCPD5eN YPr527xKsdkH+JQLr19kiQCRBDeHHCs= X-Authority-Analysis: v=2.4 cv=ZfSIpcVA c=1 sm=1 tr=0 ts=6adb5e4f cx=c_pps a=3Bg1Hr4SwmMryq2xdFQyZA==:117 a=3Bg1Hr4SwmMryq2xdFQyZA==:17 a=660iZSQnnn4A:10 a=VkNPw1HP01LnGYTKEx00:22 a=RnoormkPH1_aCDwRdu11:22 a=RzCfie-kr_QcCd8fBx8p:22 a=VnNF1IyMAAAA:8 a=K5S5juBvcUcC1lOVBgwA:9 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.138,FMLib:17.12.100.49 definitions=2026-10-23_03,2026-10-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 impostorscore=0 malwarescore=0 spamscore=0 suspectscore=0 clxscore=1015 phishscore=0 bulkscore=0 lowpriorityscore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610190000 definitions=main-2610230051 There is a new feature in scheduler called as Cache Aware Scheduling. It tries to keep related tasks within the same LLC domain while keeping the system reasonably balanced. Cache Aware Scheduling assumes that the scheduler LLC domain is large enough to be a useful placement target. This is true on many systems where an LLC spans several cores, but not on PowerPC systems where the scheduler-visible LLC is at the SMT level. In that case, sd_llc_size is effectively the SMT width. This becomes visible in the capacity check: !fits_capacity((mm->sc_stat.nr_running_avg * cpu_smt_num_threads), scale * per_cpu(sd_llc_size, cpu)); As a result, it may be enabled but has no room to operate. Hence provide a kernel parameter so that one can try experiment their workload with cache aware scheduling. This also provides ways to explore it on system with SMT=4 to see if there are any opportunities to improve or uncover bugs if there is any. This does not change the hardware cache topology. It only changes the sched-domain level at which SD_SHARE_LLC is set. There is no point in setting NUMA as the LLC domain. So give option until pkg to experiment with. Actual flag manipulations for sched domain flags and llc mask is updated in the subsequent patches. Signed-off-by: Shrikanth Hegde --- arch/powerpc/kernel/smp.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c index 6a5a5469aaae..6b1201ea3572 100644 --- a/arch/powerpc/kernel/smp.c +++ b/arch/powerpc/kernel/smp.c @@ -1059,6 +1059,29 @@ static bool has_coregroup_support(void) return coregroup_enabled; } +enum llc_override_values { + LLC_OVERRIDE_MC = 1, + LLC_OVERRIDE_PKG = 2, +}; + +static int llc_override; + +static int __init set_llc_override(char *str) +{ + if (!strcasecmp(str, "mc") && has_coregroup_support()) + WRITE_ONCE(llc_override, LLC_OVERRIDE_MC); + else if (!strcasecmp(str, "pkg")) + WRITE_ONCE(llc_override, LLC_OVERRIDE_PKG); + else { + pr_warn("Unsupported llc_override=%s\n", str); + return 1; + } + + pr_info("llc_override set at domain: %s\n", str); + return 1; +} +__setup("llc_override=", set_llc_override); + static int __init init_big_cores(void) { int cpu; -- 2.52.0