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Fri, 23 Oct 2026 13:17:03 +0000 (GMT) Received: from li-7bb28a4c-2dab-11b2-a85c-887b5c60d769.ibm.com.com (unknown [9.39.19.68]) by smtpav04.fra02v.mail.ibm.com (Postfix) with ESMTP; Fri, 23 Oct 2026 13:17:03 +0000 (GMT) From: Shrikanth Hegde To: maddy@linux.ibm.com, linuxppc-dev@lists.ozlabs.org, peterz@infradead.org, tim.c.chen@linux.intel.com Cc: sshegde@linux.ibm.com, christophe.leroy@csgroup.eu, linux-kernel@vger.kernel.org, ritesh.list@gmail.com, kprateek.nayak@amd.com, yu.c.chen@intel.com, vineethr@linux.ibm.com, vincent.guittot@linaro.org, srikar@linux.ibm.com, npiggin@gmail.com, mpe@ellerman.id.au Subject: [PATCH v2 3/4] powerpc/topology: Update arch_llc_mask based llc_override Date: Fri, 23 Oct 2026 18:46:45 +0530 Message-ID: <20261023131646.2907938-4-sshegde@linux.ibm.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20261023131646.2907938-1-sshegde@linux.ibm.com> References: <20261023131646.2907938-1-sshegde@linux.ibm.com> X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-TM-AS-GCONF: 00 X-Proofpoint-Reinject: loops=2 maxloops=12 X-Authority-Analysis: v=2.4 cv=X63Hu2Te c=1 sm=1 tr=0 ts=6adb5e59 cx=c_pps a=GFwsV6G8L6GxiO2Y/PsHdQ==:117 a=GFwsV6G8L6GxiO2Y/PsHdQ==:17 a=660iZSQnnn4A:10 a=VkNPw1HP01LnGYTKEx00:22 a=RnoormkPH1_aCDwRdu11:22 a=Y2IxJ9c9Rs8Kov3niI8_:22 a=VnNF1IyMAAAA:8 a=c4_4ORLq-ylGgVheI_IA:9 X-Proofpoint-ORIG-GUID: d3cXJXhwwGZ67gt1kgxSF053CffX1GO7 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDIzMDA1MSBTYWx0ZWRfX0+D4h36CoiKW NtTselcQsxW4OD11T8VfR6Xe43PAPUdWqnMpC5dc8qc+CZoZY47jyeNb27bUYWlz1bfJLKO+pJq 6rgfjDvhfV5sSy8XRP2xKNsbQUtcg85MXMv3BCCnQxNaWo4wvZU+q9URbZyhyE0vXnZVQKeEzuQ InDxvMpP0EgS9TVEgyKvS2zzNtG7S1hcFVPMrUoo6R/pgnHN0gPCptdve3WTUXJEAwbdKZGONBp m/V0M3fry3la1sxH4aPOHPzUrrnv6DskVqn+Gq7wgkUWI31UNieNOMXKl2jpUyUP9NKS+nR9+v9 mQMnlIEX5gNAXvDdBqrEjOAvZdo2togDENQGE7aKK073aZfcAjHU5kOgp63IIfYspW2bgU4tITC zetEm1jAzC2Cyn022Of5ZsTAqSmG94+pr/Y/Py9yjnvv6EZoqkuJYKny9DeY2YU3zLpT/Yiu1a+ zZx+dJDY6/wSYfdMe6Q== X-Proofpoint-Spam-Info: AW1haW4tMjYxMDIzMDA1MSBTYWx0ZWRfXyKDplrX/Tkve 98I3dwfsID2sNepmiLLh+smHJq2KGPWRJFr48O6ztKLKhdr6GTzJ8aYj9HH/K8z10a2h2DrW8lD eux22/9xPA0trpUyXIZ+XejQDDv1mG4= X-Proofpoint-GUID: Dc9DVq-SItaGtsfpNkh_g10jRRkLBTmF X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.138,FMLib:17.12.100.49 definitions=2026-10-23_03,2026-10-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 phishscore=0 bulkscore=0 adultscore=0 malwarescore=0 clxscore=1015 spamscore=0 impostorscore=0 lowpriorityscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610190000 definitions=main-2610230051 Update the arch_llc_mask passed for building the cache aware scheduling data structures such as llc_id etc. Since llc_override is kernel parameter, this helps to keep the arch_llc_mask stable after boot which in turn keeps llc_id consistent, since llc_id are not updated even on rebuilding the sched domains. Signed-off-by: Shrikanth Hegde --- arch/powerpc/include/asm/topology.h | 8 ++------ arch/powerpc/kernel/smp.c | 19 +++++++++++++++++++ 2 files changed, 21 insertions(+), 6 deletions(-) diff --git a/arch/powerpc/include/asm/topology.h b/arch/powerpc/include/asm/topology.h index 44ec416fa489..e1ca91d9b2c2 100644 --- a/arch/powerpc/include/asm/topology.h +++ b/arch/powerpc/include/asm/topology.h @@ -135,12 +135,8 @@ struct cpumask *cpu_coregroup_mask(int cpu); const struct cpumask *cpu_die_mask(int cpu); int cpu_die_id(int cpu); -/* - * Points to where the LLC is. On power9 this will point at CACHE - * domain, On others it will point to SMT domain. In all cases - * cpu_l2_cache_mask points to where LLC is - */ -#define arch_llc_mask(cpu) cpu_l2_cache_mask(cpu) +const struct cpumask *arch_llc_mask(int cpu); +#define arch_llc_mask arch_llc_mask #ifdef CONFIG_PPC64 #include diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c index ca1821dedc98..4ece21abb1c4 100644 --- a/arch/powerpc/kernel/smp.c +++ b/arch/powerpc/kernel/smp.c @@ -1099,6 +1099,25 @@ static int __init set_llc_override(char *str) } __setup("llc_override=", set_llc_override); +/* + * Points to where the LLC is. On power9 this will point at CACHE + * domain, On others it will point to SMT domain. In all cases + * cpu_l2_cache_mask points to where LLC is. + * + * If there is llc_override set, return the appropriate mask + */ +const struct cpumask *arch_llc_mask(int cpu) +{ + switch (READ_ONCE(llc_override)) { + case LLC_OVERRIDE_MC: + return cpu_coregroup_mask(cpu); + case LLC_OVERRIDE_PKG: + return cpu_node_mask(cpu); + default: + return cpu_l2_cache_mask(cpu); + } +} + static int __init init_big_cores(void) { int cpu; -- 2.52.0