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[180.177.138.120]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3adeba38910sm1392312a91.1.2026.10.24.02.26.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 24 Oct 2026 02:26:03 -0700 (PDT) From: Hung-Chun Tseng To: Yixun Lan , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , E Shattow , devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, spacemit@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH v3 0/2] riscv: dts: spacemit: mark K1 boot nodes bootph-pre-ram Date: Sat, 24 Oct 2026 17:25:56 +0800 Message-ID: <20261024092558.143621-1-alan.tseng.cs@gmail.com> X-Mailer: git-send-email 2.43.0 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit On the SpacemiT K1 the BootROM loads the next boot stage into SRAM, and that stage sets up DRAM. This series marks the nodes it needs for that bootph-pre-ram: the SoC clocks, UART, boot media and the two I2C buses in k1.dtsi, and the board EEPROM (which holds the DRAM configuration), the PMIC rails and the SPI NOR in the board files. The vendor confirmed that the BootROM itself does not access the EEPROM [1]. It is tagged because bootph-pre-ram covers the phase that sets up SDRAM, and DRAM cannot be trained without it. Testing: all K1 DTBs build, and dtbs_check is clean for them with and without this series. I used Claude to help read the U-Boot SPL and the device trees. I checked the changes and ran dtbs_check myself. Changes in v3: - Reword both commit messages to describe the hardware instead of what an SPL does, and drop the U-Boot paragraph from patch 1 (E) - Tag i2c2 in k1.dtsi too, as every K1 board has the EEPROM there - Tag eeprom@50 on the OrangePi RV2 and R2S, missed in v2 (Sashiko) - Drop the Assisted-by tags, see commit 1e035297ffda - Keep E's Reviewed-by on both patches, as the changes are the ones discussed on v2 - Link to v2: https://lore.kernel.org/all/20261017180141.3477743-1-alan.tseng.cs@gmail.com/ Changes in v2: - Tag i2c8 in k1.dtsi instead of in every board file (Yixun) - Rebase onto the spacemit dt-for-next branch - Link to v1: https://lore.kernel.org/all/20261012235624.77993-1-alan.tseng.cs@gmail.com/ [1] https://lore.kernel.org/all/20261021083425-GKA125937@kernel.org/ Hung-Chun Tseng (2): riscv: dts: spacemit: k1: mark boot-critical SoC nodes bootph-pre-ram riscv: dts: spacemit: mark K1 board boot devices bootph-pre-ram arch/riscv/boot/dts/spacemit/k1-bananapi-cm6.dtsi | 5 +++++ arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts | 5 +++++ arch/riscv/boot/dts/spacemit/k1-milkv-jupiter.dts | 6 ++++++ arch/riscv/boot/dts/spacemit/k1-musepi-pro.dts | 6 ++++++ arch/riscv/boot/dts/spacemit/k1-orangepi-r2s.dts | 5 +++++ arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts | 6 ++++++ arch/riscv/boot/dts/spacemit/k1.dtsi | 14 ++++++++++++++ 7 files changed, 47 insertions(+) base-commit: d05c6236496071916e19012cda7149465f15e66e -- 2.43.0