[PATCH v2 0/1] irqchip/gic-v3: Preserve SPI state across hibernation

[Zhu Ling <zhuling2709@phytium.com.cn>]

This v2 replaces my earlier genirq/PM proposal. Please do not apply
v1. The new revision restores distributor configuration in the GICv3
driver and leaves generic IRQ PM policy unchanged.

Previous review:
https://lists.openwall.net/linux-kernel/2026/09/08/2938

Test platform: Phytium E2000Q.
Base: 17bb0e2f6c8043f70a693a5f3797471cbed354c8.
Setup: GICv3 SPI 189, level-high, CPU0 only, SATA root/swap and serial
console; disk=shutdown, pm_test=none. Serial captures confirm poweroff,
a new boot and hibernation-image restoration.

An independent module installs either request_irq() or a chained
handler on the same idle SPI. It injects one real GIC pending event
before S4 and another after restoration. It has no PM callbacks or
automatic recovery. GPIOLIB is disabled; no vendor GPIO driver or
PAD configuration participates in the test.

After-S4 results, with separate fresh boots for each registration mode:

                         hits/injected  hw_masked  pending  rescued
  unpatched ordinary          2/2           0         0        0
  unpatched chained           1/2           1         1        0
  patched chained             2/2           0         0        0
  patched ordinary            2/2           0         0        0

In the failing run the descriptor remains started=1, disabled=0 and
sw_masked=0. A separate explicit unmask delivers the queued event
without another injection or handler reinstallation. Neither patched
run needs this rescue; the SPI is already unmasked before injection.
No unsolicited interrupts were observed.

The fix saves SPI/ESPI enable, trigger, priority and routing state in
the image and restores it during syscore resume. It does not rely on
the module being probed by the boot kernel. v2 changes only GICv3,
instead of forcing chained IRQs through generic resume as v1 did.

Validation: one real S4 cycle per patched mode; ARM64 Image/modules;
W=1 GICv3 builds for ARM32 with hibernation and ARM64 without
hibernation or PM; strict checkpatch and clean-base apply checks.
Mock-MMIO ASan/UBSan checks also pass; these are not hardware tests.
Sparse was skipped by Kbuild because the installed checker is too old.

The test kernels also contain the same 8-line USB host enablement,
not included in this patch. Taint is 0 before loading the external
test module and 4096 (O) afterwards. The fixed runs use the same
Image and byte-identical full configurations.

Scope: SPI distributor configuration, not complete GICv3/ITS S4
support. ESPI hardware, PPI/SGI/LPI, deep S3, dedicated disabled-IRQ,
rollback/fault-injection, non-default configurations and repeated S4
have not been validated. No introducing commit or Fixes tag is guessed.
The reproducer and original logs are retained and can be supplied.

v1 used zhuling0805@qq.com; v2 uses zhuling2709@phytium.com.cn.

Zhu Ling (1):
  irqchip/gic-v3: Preserve SPI configuration across hibernation

 drivers/irqchip/irq-gic-v3.c | 161 +++++++++++++++++++++++++++++++++++
 1 file changed, 161 insertions(+)


base-commit: 17bb0e2f6c8043f70a693a5f3797471cbed354c8