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Sat, 24 Oct 2026 08:42:14 -0700 (PDT) Received: from plex ([2406:6d00:a27c:4200:aab8:e0ff:fe02:33c1]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-369e8daf444sm7766450eec.18.2026.10.24.08.42.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 24 Oct 2026 08:42:14 -0700 (PDT) From: Chris Scott To: netdev@vger.kernel.org Cc: lorenzo@kernel.org, andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@kernel.org, kuba@kernel.org, pabeni@redhat.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, pawlik.dan@gmail.com, zhengping.zhang@airoha.com, Chris Scott Subject: [RFC net-next 2/3] net: airoha: npu: attach a coherent pool in the NPU window Date: Sun, 25 Oct 2026 01:41:49 +1000 Message-ID: <20261024154150.45733-3-gilroyscott1970@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20261024154150.45733-1-gilroyscott1970@gmail.com> References: <20261024154150.45733-1-gilroyscott1970@gmail.com> X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The EN7581 NPU can only address host DRAM at 0x80000000-0xbfffffff; higher addresses alias the lower 1 GiB. The coherent buffers allocated on the NPU device are all shared with the NPU: since mt76 uses the NPU device as dma_dev, these are the NPU TX/RX descriptor rings, the HW-RRO ba_bitmap/addr_elem/msdu_pg/session buffers and the NPU TXD buffers. On a 2 GiB board nothing keeps them below 0xc0000000; they normally land there only because of early-boot allocation order. With low DRAM reserved away on W1700K the SoC hangs right after mt7996 firmware load. If the NPU node has an optional "dma" reserved-memory region, attach it as the device coherent pool so all of these come from the window. The next patch moves the mailbox buffers to coherent memory as well. Unlike a restricted-dma-pool this leaves streaming mappings alone. Packet buffers are passed through to the WiFi DMA engine: on W1700K with 96% of TX skbs and ~20% of RX page_pool buffers above 0xc0000000, host-path traffic and sha256 file round-trips stay intact, at the same throughput as without a pool, whereas a restricted-dma-pool (swiotlb bouncing) costs ~22% of host-path TX. A device coherent pool has no fallback once full; mt76 and the mailbox use ~10.7 MiB with MT7996, so the DT region should be 16 MiB. This patch was written with the help of Claude (Anthropic, claude- opus-5-5). Link: https://lore.kernel.org/r/atCRsquzA1UxSpCc@mediatek.com Tested-by: Daniel Pawlik Signed-off-by: Chris Scott --- drivers/net/ethernet/airoha/airoha_npu.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/drivers/net/ethernet/airoha/airoha_npu.c b/drivers/net/ethernet/airoha/airoha_npu.c index 4d3195eb00..069fd60680 100644 --- a/drivers/net/ethernet/airoha/airoha_npu.c +++ b/drivers/net/ethernet/airoha/airoha_npu.c @@ -693,6 +693,11 @@ static const struct regmap_config regmap_config = { .disable_locking = true, }; +static void airoha_npu_rmem_release(void *data) +{ + of_reserved_mem_device_release(data); +} + static int airoha_npu_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -776,6 +781,19 @@ static int airoha_npu_probe(struct platform_device *pdev) if (err) return err; + if (of_property_match_string(dev->of_node, "memory-region-names", + "dma") >= 0) { + err = of_reserved_mem_device_init_by_name(dev, dev->of_node, + "dma"); + if (err) + return err; + + err = devm_add_action_or_reset(dev, airoha_npu_rmem_release, + dev); + if (err) + return err; + } + err = airoha_npu_run_firmware(dev, base, &res); if (err) return err; -- 2.53.0