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Sat, 24 Oct 2026 19:37:02 +0000 From: Eliav Farber To: Thomas Gleixner , Antoine Tenart CC: Radu Rendec , , , Eliav Farber Subject: [PATCH v2 3/5] irqchip/alpine-msi: Add missing space after comma in GENMASK_ULL Date: Sat, 24 Oct 2026 19:36:18 +0000 Message-ID: <20261024193620.39999-4-farbere@amazon.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20261024193620.39999-1-farbere@amazon.com> References: <20261024193620.39999-1-farbere@amazon.com> X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: EX19D031UWC003.ant.amazon.com (10.13.139.252) To EX19D001UWA001.ant.amazon.com (10.13.138.214) Fix the coding-style issue reported by checkpatch: ERROR: space required after that ',' (ctx:VxV) No functional change. Signed-off-by: Eliav Farber Reviewed-by: Radu Rendec --- drivers/irqchip/irq-alpine-msi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/irqchip/irq-alpine-msi.c b/drivers/irqchip/irq-alpine-msi.c index 20f1f7f7612b..8155f63cfd29 100644 --- a/drivers/irqchip/irq-alpine-msi.c +++ b/drivers/irqchip/irq-alpine-msi.c @@ -210,7 +210,7 @@ static int alpine_msix_init(struct device_node *node, struct device_node *parent * To select the primary GIC as the target GIC, bits [18:17] must be set * to 0x0. In this case, bit 16 (SPI_TARGET_CLUSTER0) must be set. */ - priv->addr = res.start & GENMASK_ULL(63,20); + priv->addr = res.start & GENMASK_ULL(63, 20); priv->addr |= ALPINE_MSIX_SPI_TARGET_CLUSTER0; if (of_property_read_u32(node, "al,msi-base-spi", &priv->spi_first)) { -- 2.47.3