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Hence, Pixel Engine's AXI clock use count(managed by Pixel Engine driver's runtime PM) and pixel clock use count could be inbalanced after removing and re-installing the driver module. To fix this, add a helper dc_crtc_disable_at_boot() and call it to properly disable all CRTCs before advertising DRM device to user-space by calling drm_dev_register(). Fixes: 711a3b878366 ("drm/imx: Add i.MX8qxp Display Controller KMS") Reviewed-by: Frank Li Signed-off-by: Liu Ying -- v7: - Check CRTC status to ensure that clocks were enabled by a previous boot before disabling them in dc_crtc_disable_at_boot(). (Sashiko AI bot) - Modify debug message in dc_crtc_disable_at_boot(). v6: - Rebase onto the latest drm-misc-next and resolve conflicts. v3: - Collect Frank's R-b tag. --- drivers/gpu/drm/imx/dc/dc-crtc.c | 67 ++++++++++++++++++++++++++++++++++------ drivers/gpu/drm/imx/dc/dc-drv.c | 5 +++ drivers/gpu/drm/imx/dc/dc-drv.h | 3 ++ 3 files changed, 65 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/imx/dc/dc-crtc.c b/drivers/gpu/drm/imx/dc/dc-crtc.c index 0d64186a9901..c7dbe5f500b4 100644 --- a/drivers/gpu/drm/imx/dc/dc-crtc.c +++ b/drivers/gpu/drm/imx/dc/dc-crtc.c @@ -227,6 +227,7 @@ dc_crtc_atomic_enable(struct drm_crtc *crtc, struct drm_atomic_commit *state) struct drm_crtc_state *new_crtc_state = drm_atomic_get_new_crtc_state(state, crtc); struct drm_display_mode *adj = &new_crtc_state->adjusted_mode; + struct dc_drm_device *dc_drm = to_dc_drm_device(crtc->dev); struct dc_crtc *dc_crtc = to_dc_crtc(crtc); enum dc_link_id cf_link; int idx, ret; @@ -287,29 +288,37 @@ dc_crtc_atomic_enable(struct drm_crtc *crtc, struct drm_atomic_commit *state) DC_CRTC_CHECK_FRAMEGEN_FIFO(dc_crtc->fg); + dc_drv_set_crtc_enable(dc_drm, drm_crtc_index(crtc)); + drm_dev_exit(idx); out: dc_crtc_queue_state_event(new_crtc_state); } -static void -dc_crtc_atomic_disable(struct drm_crtc *crtc, struct drm_atomic_commit *state) +static inline void __dc_crtc_disable_fg(struct drm_crtc *crtc) { - struct drm_crtc_state *new_crtc_state = - drm_atomic_get_new_crtc_state(state, crtc); - struct dc_drm_device *dc_drm = to_dc_drm_device(crtc->dev); struct dc_crtc *dc_crtc = to_dc_crtc(crtc); - int idx; - - if (!drm_dev_enter(crtc->dev, &idx)) - goto out; enable_irq(dc_crtc->irq_dec_seqcomplete); dc_fg_disable(dc_crtc->fg); DC_CRTC_WAIT_FOR_COMPLETION_TIMEOUT(dec_seqcomplete_done); disable_irq(dc_crtc->irq_dec_seqcomplete); +} +static void +dc_crtc_atomic_disable(struct drm_crtc *crtc, struct drm_atomic_commit *state) +{ + struct drm_crtc_state *new_crtc_state = + drm_atomic_get_new_crtc_state(state, crtc); + struct dc_drm_device *dc_drm = to_dc_drm_device(crtc->dev); + struct dc_crtc *dc_crtc = to_dc_crtc(crtc); + int idx; + + if (!drm_dev_enter(crtc->dev, &idx)) + goto out; + + __dc_crtc_disable_fg(crtc); dc_fg_disable_clock(dc_crtc->fg); /* request pixel engine power-off as plane is off too */ @@ -318,8 +327,9 @@ dc_crtc_atomic_disable(struct drm_crtc *crtc, struct drm_atomic_commit *state) /* request display engine power-off when CRTC is disabled */ pm_runtime_put(dc_crtc->de->dev); - drm_dev_exit(idx); + dc_drv_set_crtc_disable(dc_drm, drm_crtc_index(crtc)); + drm_dev_exit(idx); out: drm_crtc_vblank_off(crtc); @@ -331,6 +341,43 @@ dc_crtc_atomic_disable(struct drm_crtc *crtc, struct drm_atomic_commit *state) spin_unlock_irq(&crtc->dev->event_lock); } +void dc_crtc_disable_at_boot(struct drm_crtc *crtc) +{ + struct dc_drm_device *dc_drm = to_dc_drm_device(crtc->dev); + struct dc_crtc *dc_crtc = to_dc_crtc(crtc); + int ret; + + ret = pm_runtime_resume_and_get(dc_crtc->de->dev); + if (ret < 0) { + dc_crtc_err(crtc, "failed to get DC display engine RPM: %d\n", + ret); + return; + } + + if (!dc_fg_wait_for_frame_index_moving(dc_crtc->fg)) { + dc_crtc_dbg(crtc, "FrameGen frame index isn't moving\n"); + goto out; + } + + dc_crtc_dbg(crtc, "disabling FrameGen at boot\n"); + __dc_crtc_disable_fg(crtc); + + if (!dc_drv_crtc_was_enabled(dc_drm, drm_crtc_index(crtc))) + goto out; + + dc_crtc_dbg(crtc, "disabling clocks at boot\n"); + + dc_fg_disable_clock(dc_crtc->fg); + + if (!dc_drm->pe_clk_axi_disabled) { + clk_disable_unprepare(dc_drm->pe->clk_axi); + dc_drm->pe_clk_axi_disabled = true; + } + +out: + pm_runtime_put(dc_crtc->de->dev); +} + static bool dc_crtc_get_scanout_position(struct drm_crtc *crtc, bool in_vblank_irq, int *vpos, int *hpos, diff --git a/drivers/gpu/drm/imx/dc/dc-drv.c b/drivers/gpu/drm/imx/dc/dc-drv.c index ac1321adf1c8..09387d62cc0b 100644 --- a/drivers/gpu/drm/imx/dc/dc-drv.c +++ b/drivers/gpu/drm/imx/dc/dc-drv.c @@ -17,6 +17,7 @@ #include #include +#include #include #include #include @@ -108,6 +109,7 @@ static int dc_drm_bind(struct device *dev) struct dc_priv *priv = dev_get_drvdata(dev); struct dc_drm_device *dc_drm; struct drm_device *drm; + struct drm_crtc *crtc; int ret; dc_drm = devm_drm_dev_alloc(dev, &dc_drm_driver, struct dc_drm_device, @@ -130,6 +132,9 @@ static int dc_drm_bind(struct device *dev) if (ret) return ret; + drm_for_each_crtc(crtc, drm) + dc_crtc_disable_at_boot(crtc); + ret = drm_dev_register(drm, 0); if (ret) { dev_err(dev, "failed to register drm device: %d\n", ret); diff --git a/drivers/gpu/drm/imx/dc/dc-drv.h b/drivers/gpu/drm/imx/dc/dc-drv.h index dd1302382ab0..1ec9304329eb 100644 --- a/drivers/gpu/drm/imx/dc/dc-drv.h +++ b/drivers/gpu/drm/imx/dc/dc-drv.h @@ -50,6 +50,8 @@ struct dc_drm_device { struct dc_pe *pe; /** @tc: tcon list */ struct dc_tc *tc[DC_DISPLAYS]; + /** @pe_clk_axi_disabled: disablement flag at boot */ + bool pe_clk_axi_disabled; }; struct dc_subdev_info { @@ -96,6 +98,7 @@ static inline int dc_subdev_get_id(const struct dc_subdev_info *info, return -EINVAL; } +void dc_crtc_disable_at_boot(struct drm_crtc *crtc); void dc_de_post_bind(struct dc_drm_device *dc_drm); void dc_pe_post_bind(struct dc_drm_device *dc_drm); -- 2.43.0