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charset="utf-8" Message-Id: <20261026-msm-dpu-res-clean-v2-6-3d864435186e@gmail.com> References: <20261026-msm-dpu-res-clean-v2-0-3d864435186e@gmail.com> In-Reply-To: <20261026-msm-dpu-res-clean-v2-0-3d864435186e@gmail.com> To: Rob Clark , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Xi Zhang X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1793046364; l=1211; i=xz.ca.cn@gmail.com; s=20261026; h=from:subject:message-id; bh=wGiN+gugp5FNldO/Kg3sFcSJT75myNdU6h5lxozuNKM=; b=XeYvMeWiN8pWxAujZwv1lVFeUuZWtbYdWkRtqIUxjFcwFi1t9hLTcgJplJAkouXRs5pRxEzHJ Wlwqz6H2XOcBbB9Zf3kc3ceKOK6LDAw72c2JuTWnlB9yTrzm0Lffg7z X-Developer-Key: i=xz.ca.cn@gmail.com; a=ed25519; pk=aRUll5L3eJbwG8Y4BO9uySKGzm+Uy+Ccei9prnRVZRs= X-Endpoint-Received: by B4 Relay for xz.ca.cn@gmail.com/20261026 with auth_id=1328 X-Original-From: Xi Zhang Reply-To: xz.ca.cn@gmail.com Content-Transfer-Encoding: 7bit From: Xi Zhang >From observation, DSC_CMN_MAIN_CNF has hardware restriction on differing values between paired even/odd dsc. Reset it to 0 when dsc disable to avoid issues when a dsc pair is later used individually for each of its dsc. Note that currently dpu always assigns dsc in pairs if possible for power saving. In the future, it may be desired to assign singular dsc if possible to support high display count. e.g. when dsc for DisplayPort support is added. Tested on Ayaneo Pocket DS (SM8550 Kalama) Signed-off-by: Xi Zhang --- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc_1_2.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc_1_2.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc_1_2.c index b3395e9c34a1..b8a330d813e6 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc_1_2.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc_1_2.c @@ -78,6 +78,7 @@ static void dpu_hw_dsc_disable_1_2(struct dpu_hw_dsc *hw_dsc) hw = &hw_dsc->hw; sblk = hw_dsc->caps->sblk; + DPU_REG_WRITE(hw, DSC_CMN_MAIN_CNF, 0); DPU_REG_WRITE(hw, sblk->ctl.base + DSC_CFG, 0); DPU_REG_WRITE(hw, sblk->enc.base + ENC_DF_CTRL, 0); -- 2.55.0