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charset="utf-8" Message-Id: <20261026-nxp-stm-fixes-v1-2-20a64a4ea454@redhat.com> References: <20261026-nxp-stm-fixes-v1-0-20a64a4ea454@redhat.com> In-Reply-To: <20261026-nxp-stm-fixes-v1-0-20a64a4ea454@redhat.com> To: Daniel Lezcano , Thomas Gleixner , Maxime Coquelin , Alexandre Torgue , Sebastian Andrzej Siewior , Clark Williams , Steven Rostedt Cc: linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-rt-devel@lists.linux.dev, Enric Balletbo i Serra X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1793004293; l=2807; i=eballetb@redhat.com; s=20261026; h=from:subject:message-id; bh=L1v5tjj5j+Wq0siw9q/hKpdjRRXRlMLbbuhC7iKp4ic=; b=cGWaYFHHdQAsdou2DcXrTVsUM5zfG6BRmXstksyJxMgAfkKif+TedfSdBhJTJ4xbtCHlyzVNj 9tqansaOe7dBKdq00wXcVflgmQKIeqRmfXu0rqghT4itUZO/ol+DvI8 X-Developer-Key: i=eballetb@redhat.com; a=ed25519; pk=5zh6xuAxTiQwglL2NXQFqWuyRPmCE8T5KPXLbNXhnKI= X-Endpoint-Received: by B4 Relay for eballetb@redhat.com/20261026 with auth_id=1324 X-Original-From: Enric Balletbo i Serra Reply-To: eballetb@redhat.com Content-Transfer-Encoding: 7bit From: Enric Balletbo i Serra The NXP STM generates an interrupt only on exact match between STM_CNT and STM_CMP0. If the counter passes the comparator value before the overshoot check runs, the match is missed and the hardware must count through all 2^32 ticks (~32.2s at 133 MHz) before firing, causing soft lockups. The existing overshoot check: if (val > nxp_stm_clockevent_read_counter(stm_timer) + delta) simplifies to checking if counter_before > counter_after, which only detects a 32-bit counter wrap and misses the normal overshoot case where the counter advances past val. Use a signed comparison on the difference between the target and current counter values instead, following the established pattern in timer-imx-gpt. If the counter has reached or passed val, the signed difference goes to zero or negative and we return -ETIME so the clockevents layer retries immediately. Fixes: cec32ac75827 ("clocksource/drivers/nxp-timer: Add the System Timer Module for the s32gx platforms") Signed-off-by: Enric Balletbo i Serra --- drivers/clocksource/timer-nxp-stm.c | 16 ++++++---------- 1 file changed, 6 insertions(+), 10 deletions(-) diff --git a/drivers/clocksource/timer-nxp-stm.c b/drivers/clocksource/timer-nxp-stm.c index ee249fed1b91..ed7662a4e2bc 100644 --- a/drivers/clocksource/timer-nxp-stm.c +++ b/drivers/clocksource/timer-nxp-stm.c @@ -247,7 +247,7 @@ static int nxp_stm_clockevent_shutdown(struct clock_event_device *ced) static int nxp_stm_clockevent_set_next_event(unsigned long delta, struct clock_event_device *ced) { struct stm_timer *stm_timer = ced_to_stm(ced); - u32 val; + u32 val, now; nxp_stm_clockevent_disable(stm_timer); @@ -258,16 +258,12 @@ static int nxp_stm_clockevent_set_next_event(unsigned long delta, struct clock_e writel(val, STM_CMP0(stm_timer->base)); /* - * The counter is shared across the channels and can not be - * stopped while we are setting the next event. If the delta - * is very small it is possible the counter increases above - * the computed 'val'. The min_delta value specified when - * registering the clockevent will prevent that. The second - * case is if the counter wraps while we compute the 'val' and - * before writing the comparator register. We read the counter, - * check if we are back in time and abort the timer with -ETIME. + * If the counter reached or passed 'val' during or before the + * write to the comparator, the hardware match will be missed, + * resulting in a full 32-bit (32.2s) wraparound lockup. */ - if (val > nxp_stm_clockevent_read_counter(stm_timer) + delta) + now = nxp_stm_clockevent_read_counter(stm_timer); + if ((int)(val - now) <= 0) return -ETIME; nxp_stm_clockevent_enable(stm_timer); -- 2.52.0