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[180.177.138.120]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3adebfa53c3sm6699893a91.13.2026.10.25.22.44.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 25 Oct 2026 22:44:34 -0700 (PDT) From: Hung-Chun Tseng To: Anand Moon Cc: dlan@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, pjw@kernel.org, palmer@dabbelt.com, aou@eecs.berkeley.edu, alex@ghiti.fr, e@freeshell.de, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, spacemit@lists.linux.dev, linux-kernel@vger.kernel.org Subject: Re: [PATCH v3 1/2] riscv: dts: spacemit: k1: mark boot-critical SoC nodes bootph-pre-ram Date: Mon, 26 Oct 2026 13:44:27 +0800 Message-ID: <20261026054430.557499-1-alan.tseng.cs@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: <20261024092558.143621-1-alan.tseng.cs@gmail.com> <20261024092558.143621-2-alan.tseng.cs@gmail.com> <20261025130206.187282-1-alan.tseng.cs@gmail.com> X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Hi Anand, On Mon, 26 Oct 2026 at 13:38, Anand Moon wrote: > The main issue is that SPL_PINCTRL and SPL_GPIO support are required > for board bring-up, > but these options are currently missing from the U-Boot configuration. Thanks for the log. You're right that the SPL can load the next stage from a different device than the one the BootROM used. In your log the BootROM boots from SD and the SPL then fails to find the SPI NOR, maybe because nothing has set up those pins. So tagging the pin groups of the boot devices makes sense to me, as jh7110-common.dtsi does for its i2c5 pins. I'd do that once U-Boot enables SPL_PINCTRL for K1, so that the tags have a user. It would also go in the add-on patch rather than the BootROM one, following E's split. PCIe and Ethernet I'd still leave out, as the SPL does not use them. > I am following the approach used in configs/starfive_visionfive2_defconfig > to keep arch/riscv/dts/spacemit-k1-u-boot.dtsi as minimal and generic > as possible, I agree with that goal. For the regulators, I think the board files should use the names from each board's schematic, and the SPL should find the rails some other way than by a fixed name. Otherwise every new board has to use the same names. Would you like to send the U-Boot side (SPL_PINCTRL/SPL_GPIO)? I'm happy to test it on a Milk-V Jupiter. Thanks, Hung-Chun