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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: NI3V4I1TnNYdshcI+/kpUQIuAor9gNem37hkXcaTvyGWYc6hLGw027zgPOm+WXiZ+XT12+7t5G9sG8WKOrTTA+MH250bxh/KzjnnJAlz09RTqGfue287BCs/iUN+iH46sbw/Jgu9hYhOr2pH3eByua4ybA4iww1UC14EvVk4aU4n37P9Cmnd2Ox8WAaUUmYZZU8Cz9kw9pLV+mL4z77uRVzBx32ZZNXtUCoVtwJRfTXfPM0czPFoyQZcqbkp55xiG6fZ0y7l4g/TmGt5kZ+deZd2fA+LfbfB4cJWyyHfP1oXVCLPd/TlKEf411shMCzS/6fM3JBe031m1iO/aX5/gEj6xLuCWMbru66nu1uRzgyiYGxHQ4s/PZhZrk2fHKOuOgfzG0qpbr47Nw0ckec6nzWpKDFhC0uybZsuejtJ6s/Kf7fzyBaCwLcKakmMZcQH X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 Oct 2026 11:14:29.8281 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 5c9c2209-e4c3-4aa1-b693-08df33524e13 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.233];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF0000A890.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA3PR12MB8439 tegra_qspi_dma_unmap_xfer() assumes a streaming mapping is always outstanding and recomputes its length from the live tqspi->curr_dma_words. Nothing records whether tegra_qspi_dma_map_xfer() mapped anything, so neither assumption holds. For a multi-chunk transfer, handle_dma_based_xfer() unmaps the chunk that just completed, recalculates the parameters for the next chunk, which overwrites curr_dma_words, and re-arms the hardware. If tegra_qspi_start_dma_based_transfer() then fails at its tegra_qspi_dma_map_xfer() call, nothing is mapped. That early return also sits above the smp_store_release() that clears tqspi->trans_status, so the previous chunk's QSPI_RDY survives, and the re-arm's return value is never checked, so handle_dma_based_xfer() returns IRQ_HANDLED without completing the transfer. The caller times out, tegra_qspi_handle_timeout() sees the stale QSPI_RDY, concludes the transfer completed and calls handle_dma_based_xfer() again. No DMA completion arrives, so num_errors is incremented and tegra_qspi_dma_unmap_xfer() runs with nothing mapped. t->tx_dma then holds either the DMA_MAPPING_ERROR sentinel or, if the RX mapping was the one that failed, the preceding chunk's address that has already been released. Behind an IOMMU the latter frees an IOVA that may since have been reallocated. Record whether a mapping is outstanding and the length that was mapped, and return early from tegra_qspi_dma_unmap_xfer() when there is nothing to release. is_dma_mapped is only updated under tqspi->lock, or on the timeout path after synchronize_irq() and cancel_work_sync() have quiesced the ISR and the bottom half. Also skip releasing the TX mapping on the RX failure path unless a TX mapping was created; t->tx_dma is uninitialised when t->tx_buf is NULL. Fixes: 921fc1838fb0 ("spi: tegra210-quad: Add support for Tegra210 QSPI controller") Suggested-by: Mark Brown Cc: stable@vger.kernel.org Signed-off-by: Vishwaroop A --- drivers/spi/spi-tegra210-quad.c | 31 +++++++++++++++++++++++++------ 1 file changed, 25 insertions(+), 6 deletions(-) diff --git a/drivers/spi/spi-tegra210-quad.c b/drivers/spi/spi-tegra210-quad.c index 4a5933d8112c..d74aa46636ec 100644 --- a/drivers/spi/spi-tegra210-quad.c +++ b/drivers/spi/spi-tegra210-quad.c @@ -237,6 +237,17 @@ struct tegra_qspi { bool is_packed; bool use_dma; + /* + * Set while a streaming mapping created by + * tegra_qspi_dma_map_xfer() is outstanding, together with the + * length that was handed to dma_map_single(). is_curr_dma_xfer + * only records that the last armed chunk took the DMA path, + * which is not the same thing: a chunk whose mapping failed + * leaves the DMA path flagged with nothing mapped. + */ + bool is_dma_mapped; + unsigned int dma_map_len; + u32 command1_reg; u32 dma_control_reg; u32 def_command1_reg; @@ -606,24 +617,32 @@ static int tegra_qspi_dma_map_xfer(struct tegra_qspi *tqspi, struct spi_transfer if (t->rx_buf) { t->rx_dma = dma_map_single(tqspi->rx_dma_dev, (void *)rx_buf, len, DMA_FROM_DEVICE); if (dma_mapping_error(tqspi->rx_dma_dev, t->rx_dma)) { - dma_unmap_single(tqspi->tx_dma_dev, t->tx_dma, len, DMA_TO_DEVICE); + if (t->tx_buf) + dma_unmap_single(tqspi->tx_dma_dev, t->tx_dma, + len, DMA_TO_DEVICE); return -ENOMEM; } } + tqspi->dma_map_len = len; + tqspi->is_dma_mapped = true; + return 0; } static void tegra_qspi_dma_unmap_xfer(struct tegra_qspi *tqspi, struct spi_transfer *t) { - unsigned int len; - - len = DIV_ROUND_UP(tqspi->curr_dma_words * tqspi->bytes_per_word, 4) * 4; + if (!tqspi->is_dma_mapped) + return; if (t->tx_buf) - dma_unmap_single(tqspi->tx_dma_dev, t->tx_dma, len, DMA_TO_DEVICE); + dma_unmap_single(tqspi->tx_dma_dev, t->tx_dma, + tqspi->dma_map_len, DMA_TO_DEVICE); if (t->rx_buf) - dma_unmap_single(tqspi->rx_dma_dev, t->rx_dma, len, DMA_FROM_DEVICE); + dma_unmap_single(tqspi->rx_dma_dev, t->rx_dma, + tqspi->dma_map_len, DMA_FROM_DEVICE); + + tqspi->is_dma_mapped = false; } static int tegra_qspi_start_dma_based_transfer(struct tegra_qspi *tqspi, struct spi_transfer *t) -- 2.17.1