From: David Laight <david.laight.linux@gmail.com>
To: Eric Biggers <ebiggers@kernel.org>
Cc: linux-raid@vger.kernel.org,
Andrew Morton <akpm@linux-foundation.org>,
linux-crypto@vger.kernel.org, x86@kernel.org,
linux-kernel@vger.kernel.org, Christoph Hellwig <hch@lst.de>
Subject: Re: [PATCH 3/3] raid6: simplify CPU feature checks
Date: Mon, 26 Oct 2026 14:57:04 +0000 [thread overview]
Message-ID: <20261026145704.5601466f@pumpkin> (raw)
In-Reply-To: <20261025191207.86590-4-ebiggers@kernel.org>
On Sun, 25 Oct 2026 12:12:07 -0700
Eric Biggers <ebiggers@kernel.org> wrote:
> Remove unnecessary checks for features that are prerequisites for other
> features, such as AVX which is a prerequisite for AVX2.
>
> (Note: in most cases arch/x86/kernel/cpu/cpuid-deps.c warns about
> missing prerequisites rather than enforcing them. This is intentional,
> and it does not mean the prerequisites should be checked elsewhere.)
>
> Then, move the raid6_recov_algo_add() lines into the appropriate places
> just above so that the same CPU features aren't checked multiple times.
>
> Signed-off-by: Eric Biggers <ebiggers@kernel.org>
> ---
> lib/raid/raid6/x86/pq_arch.h | 51 ++++++++----------------------------
> 1 file changed, 11 insertions(+), 40 deletions(-)
>
> diff --git a/lib/raid/raid6/x86/pq_arch.h b/lib/raid/raid6/x86/pq_arch.h
> index 4a863b253b909..418e4d4a2930f 100644
> --- a/lib/raid/raid6/x86/pq_arch.h
> +++ b/lib/raid/raid6/x86/pq_arch.h
> @@ -16,63 +16,34 @@ extern const struct raid6_recov_calls raid6_recov_ssse3;
> extern const struct raid6_recov_calls raid6_recov_avx2;
> extern const struct raid6_recov_calls raid6_recov_avx512;
>
> ...
> static __always_inline void __init arch_raid6_init(void)
> {
> - if (raid6_has_avx2()) {
> + if (boot_cpu_has(X86_FEATURE_AVX2)) {
> raid6_algo_add(&raid6_avx2x1);
> raid6_algo_add(&raid6_avx2x2);
> if (IS_ENABLED(CONFIG_X86_64))
> raid6_algo_add(&raid6_avx2x4);
> - if (raid6_has_avx512()) {
> + if (boot_cpu_has(X86_FEATURE_AVX512BW) &&
> + boot_cpu_has(X86_FEATURE_AVX512VL) &&
> + boot_cpu_has(X86_FEATURE_AVX512DQ)) {
> raid6_algo_add(&raid6_avx512x1);
> raid6_algo_add(&raid6_avx512x2);
> if (IS_ENABLED(CONFIG_X86_64))
> raid6_algo_add(&raid6_avx512x4);
> + raid6_recov_algo_add(&raid6_recov_avx512);
> + } else {
> + raid6_recov_algo_add(&raid6_recov_avx2);
Is that right (you haven't changed it)?
You get both the avx2 and axv512 normal algorithms, but only one
of the recov ones.
I presume these are added in addition to the generic C code and
some startup test decides which is fastest and so used?
David
> }
> - } else if (IS_ENABLED(CONFIG_X86_64) || raid6_has_sse2()) {
> + } else if (IS_ENABLED(CONFIG_X86_64) ||
> + boot_cpu_has(X86_FEATURE_XMM2)) {
> /* x86_64 can assume SSE2 as baseline */
> raid6_algo_add(&raid6_sse2x1);
> raid6_algo_add(&raid6_sse2x2);
> if (IS_ENABLED(CONFIG_X86_64))
> raid6_algo_add(&raid6_sse2x4);
> + if (boot_cpu_has(X86_FEATURE_SSSE3))
> + raid6_recov_algo_add(&raid6_recov_ssse3);
> } else {
> raid6_algo_add_default();
> }
> -
> - if (raid6_has_avx512())
> - raid6_recov_algo_add(&raid6_recov_avx512);
> - else if (raid6_has_avx2())
> - raid6_recov_algo_add(&raid6_recov_avx2);
> - else if (raid6_has_ssse3())
> - raid6_recov_algo_add(&raid6_recov_ssse3);
> }
next prev parent reply other threads:[~2026-10-26 14:57 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-25 19:12 [PATCH 0/3] raid: remove obsolete MMX optimized code Eric Biggers
2026-10-25 19:12 ` [PATCH 1/3] xor: " Eric Biggers
2026-10-25 19:12 ` [PATCH 2/3] raid6: " Eric Biggers
2026-10-25 19:12 ` [PATCH 3/3] raid6: simplify CPU feature checks Eric Biggers
2026-10-26 14:57 ` David Laight [this message]
2026-10-26 18:47 ` Eric Biggers
2026-10-26 15:00 ` [PATCH 0/3] raid: remove obsolete MMX optimized code David Laight
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