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These are enumerated in CPUID leaf 0x28 in a parallel manner to CPUID leaf 0x10. Create new #defines, add dependencies, and initialize from CPUID. Signed-off-by: Tony Luck --- arch/x86/include/asm/cpufeatures.h | 3 +++ arch/x86/kernel/cpu/cpuid-deps.c | 2 ++ arch/x86/kernel/cpu/scattered.c | 3 +++ 3 files changed, 8 insertions(+) diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h index f70ee74b5f92..8a800964c100 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -430,6 +430,9 @@ #define X86_FEATURE_SUCCOR (17*32+ 1) /* "succor" Uncorrectable error containment and recovery */ #define X86_FEATURE_CPPC_PERF_PRIO (17*32+ 2) /* CPPC Floor Perf support */ #define X86_FEATURE_SMCA (17*32+ 3) /* "smca" Scalable MCA */ +#define X86_FEATURE_RDT_A_ASYM (17*32+ 4) /* Asymmetric allocation features */ +#define X86_FEATURE_ASYM_CAT_L2 (17*32+ 5) /* Asymmetric Cache Allocation Technology L2 */ +#define X86_FEATURE_ASYM_CDP_L2 (17*32+ 6) /* Asymmetric Code and Data Prioritization L2 */ /* Intel-defined CPU features, CPUID level 0x00000007:0 (EDX), word 18 */ #define X86_FEATURE_AVX512_4VNNIW (18*32+ 2) /* "avx512_4vnniw" AVX-512 Neural Network Instructions */ diff --git a/arch/x86/kernel/cpu/cpuid-deps.c b/arch/x86/kernel/cpu/cpuid-deps.c index 99801e844b30..b5d44cf12df6 100644 --- a/arch/x86/kernel/cpu/cpuid-deps.c +++ b/arch/x86/kernel/cpu/cpuid-deps.c @@ -73,6 +73,8 @@ static const struct cpuid_dep cpuid_deps[] = { { X86_FEATURE_BMEC, X86_FEATURE_CQM_MBM_TOTAL }, { X86_FEATURE_BMEC, X86_FEATURE_CQM_MBM_LOCAL }, { X86_FEATURE_SDCIAE, X86_FEATURE_CAT_L3 }, + { X86_FEATURE_ASYM_CAT_L2, X86_FEATURE_RDT_A_ASYM }, + { X86_FEATURE_ASYM_CDP_L2, X86_FEATURE_RDT_A_ASYM }, { X86_FEATURE_AVX512_BF16, X86_FEATURE_AVX512VL }, { X86_FEATURE_AVX512_FP16, X86_FEATURE_AVX512BW }, { X86_FEATURE_ENQCMD, X86_FEATURE_XSAVES }, diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c index 8665a6474806..02e405a95dbd 100644 --- a/arch/x86/kernel/cpu/scattered.c +++ b/arch/x86/kernel/cpu/scattered.c @@ -28,6 +28,7 @@ static const struct cpuid_bit cpuid_bits[] = { { X86_FEATURE_APERFMPERF, CPUID_ECX, 0, 0x00000006, 0 }, { X86_FEATURE_EPB, CPUID_ECX, 3, 0x00000006, 0 }, { X86_FEATURE_INTEL_PPIN, CPUID_EBX, 0, 0x00000007, 1 }, + { X86_FEATURE_RDT_A_ASYM, CPUID_ECX, 1, 0x00000007, 1 }, { X86_FEATURE_MSR_IMM, CPUID_ECX, 5, 0x00000007, 1 }, { X86_FEATURE_APX, CPUID_EDX, 21, 0x00000007, 1 }, { X86_FEATURE_RRSBA_CTRL, CPUID_EDX, 2, 0x00000007, 2 }, @@ -46,6 +47,8 @@ static const struct cpuid_bit cpuid_bits[] = { { X86_FEATURE_SGX2, CPUID_EAX, 1, 0x00000012, 0 }, { X86_FEATURE_SGX_EUPDATESVN, CPUID_EAX, 10, 0x00000012, 0 }, { X86_FEATURE_SGX_EDECCSSA, CPUID_EAX, 11, 0x00000012, 0 }, + { X86_FEATURE_ASYM_CAT_L2, CPUID_EBX, 2, 0x00000028, 0 }, + { X86_FEATURE_ASYM_CDP_L2, CPUID_ECX, 2, 0x00000028, 2 }, { X86_FEATURE_OVERFLOW_RECOV, CPUID_EBX, 0, 0x80000007, 0 }, { X86_FEATURE_SUCCOR, CPUID_EBX, 1, 0x80000007, 0 }, { X86_FEATURE_SMCA, CPUID_EBX, 3, 0x80000007, 0 }, -- 2.56.0