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Tue, 27 Oct 2026 04:19:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1793074769; bh=4qv9GBI/rff/ofiL+Z9pE00Rlu1w4yrYAER5h1S95vo=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To; b=mmzCePRjI1l/FbMkMTiH5Z+r1MMtqlbNDUSQxXhrQJWJ6xYW20U+JvJPA+cEgM3pQ chjs+twt8UyTDBP8YaMH/iuldn9+BQGgHp5Ls0erXs1s6vUg6yDq93gS8sdZbLNKQ3 YO0u3ZuoDubSCZBipVZRnaFDiDjWt/uYw6ikbnAFVESuRfliCBtPN6cEhkJBm5fOXH HRF+k+eFC07KvuMDp5ciz0+wjneh3uIfaJk6fJbC3ZCP1bHxry2SlTijszvdOO5VgS gfgKhnZfCe4ehe6/ez7agpuanCpBQqPS0ab38rveLv+QNkZmrVYzmy5CUz7ZPe44RM eCr/OOSgvx5OQ== Received: from nexus.subspace.kernel.org (localhost [IPv6:::1]) by lkml.kernel.org (Postfix) with ESMTP id CD17F44F90; Tue, 27 Oct 2026 04:19:26 +0000 (UTC) From: Long Zhao via B4 Relay Date: Tue, 27 Oct 2026 12:18:52 +0800 Subject: [PATCH v12 05/11] gpio: pl061: use IRQ_TYPE_LEVEL_MASK and IRQ_TYPE_EDGE_BOTH X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Message-Id: <20261027-cv75-gpio-v12-5-c22555400e18@ambarella.com> References: <20261027-cv75-gpio-v12-0-c22555400e18@ambarella.com> In-Reply-To: <20261027-cv75-gpio-v12-0-c22555400e18@ambarella.com> To: Bartosz Golaszewski , linux-gpio@vger.kernel.org Cc: Linus Walleij , Michael Walle , Andy Shevchenko , Rob Herring , Krzysztof Kozlowski , Krzysztof Kozlowski , Krzysztof Kozlowski , Conor Dooley , devicetree@vger.kernel.org, Long Zhao , Long Zhao , linux-kernel@vger.kernel.org X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1793074764; l=1433; i=longzhao@ambarella.com; s=20260730; h=from:subject:message-id; bh=qYs7A+3O2UQ/LJH+vQzcUZYSnBtFDMS1HvLlsWFL8rw=; b=LCQSP6WnR1giOzxLIuYaQjlYElWLho+wkQztdqCAvr+KCtXFCrh6GFHzcCXMCFUxcj62tuxm8 RzbPYqHbZQoBIwKjpRYK1PSjF3gjgk2oqYL39wEAsDUARFUY0nqvd+P X-Developer-Key: i=longzhao@ambarella.com; a=ed25519; pk=/xGhPTOX0/eYsyTWzyjjgAIW1Z/YD+IlnOnvcdRozow= X-Endpoint-Received: by B4 Relay for longzhao@ambarella.com/20260730 with auth_id=903 X-Original-From: Long Zhao Reply-To: longzhao@ambarella.com Content-Transfer-Encoding: 7bit From: Long Zhao Use the standard IRQ_TYPE_LEVEL_MASK and IRQ_TYPE_EDGE_BOTH helpers instead of open-coded edge and level comparisons. Reviewed-by: Linus Walleij Reviewed-by: Andy Shevchenko Signed-off-by: Long Zhao --- drivers/gpio/gpio-pl061.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/gpio/gpio-pl061.c b/drivers/gpio/gpio-pl061.c index 781bef987339..e0ac8335bae4 100644 --- a/drivers/gpio/gpio-pl061.c +++ b/drivers/gpio/gpio-pl061.c @@ -167,9 +167,7 @@ static int pl061_irq_type(struct irq_data *d, unsigned trigger) if (offset < 0 || offset >= PL061_GPIO_NR) return -EINVAL; - if ((trigger & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) && - (trigger & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING))) - { + if ((trigger & IRQ_TYPE_LEVEL_MASK) && (trigger & IRQ_TYPE_EDGE_BOTH)) { dev_err(gc->parent, "trying to configure line %d for both level and edge " "detection, choose one!\n", @@ -184,7 +182,7 @@ static int pl061_irq_type(struct irq_data *d, unsigned trigger) regmap_read(pl061->regmap, GPIOIS, &gpiois); regmap_read(pl061->regmap, GPIOIBE, &gpioibe); - if (trigger & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) { + if (trigger & IRQ_TYPE_LEVEL_MASK) { bool polarity = trigger & IRQ_TYPE_LEVEL_HIGH; /* Disable edge detection */ -- 2.34.1