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Tue, 27 Oct 2026 04:24:06 -0500 From: Abhijit Gangurde To: , CC: , , , , , "Abhijit Gangurde" Subject: [for-next 2/3] RDMA/ionic: set the SQ WQE color bit Date: Tue, 27 Oct 2026 14:53:52 +0530 Message-ID: <20261027092353.1961552-2-abhijit.gangurde@amd.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20261027092353.1961552-1-abhijit.gangurde@amd.com> References: <20261027092353.1961552-1-abhijit.gangurde@amd.com> X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY8PEPF0000005B:EE_|PH0PR12MB8150:EE_ X-MS-Office365-Filtering-Correlation-Id: e7f9fbdc-02e9-49c0-7694-08df340c0eb4 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|376014|36860700016|23010399003|82310400026|261026121527099003|11063799006|56012099006|261021121427099003|261009223027099003|261022105027099003|261022075727099003|261021135927099003|10067099003|22082099003|18002099003|261026140227099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: tldw4f9FrtAPqeCh0xnl/bxIaAToeIgkI+lb+/JKoYtz4tqb2K92tcIKO2njLIr8A9QYfCsi/tA1SSBHNFH2FmaW3b6Ajhyz/vJalkLYmKUTsqfUludcPTb7q4tC/shOkLjg5+MmLso+WwukXKSFwY8xtO0Kg0l/CVcNsztV5jz08VW1IcgTE65ssT829wbew4ra4uiEol2sCpcd+GhxQmkC5hb7ruJjaRGNv+y6QZ/WvVW2xlkFHffrzCjO9oGNaGvSlkqjZjoDRWQxjJWsVB7k1e5/E34xWUEeoQ5kqdVOEM5/OO67CdvOw9a6zoSzg68NTaTKcBADEFy0kfwZlsGLUraqKtr3o4gecdYz2Um2g7DFIYR8RV815myCZ9pvHK8xtDwIwcegsBFJuNy6cj42Z5ceqbVu6/2gfMGcZBXQSSv0LKP3LqA1g/xE/X74 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Oct 2026 09:24:09.9966 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e7f9fbdc-02e9-49c0-7694-08df340c0eb4 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY8PEPF0000005B.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH0PR12MB8150 From: Amit Kumar The NIC uses the WQE color bit to tell one pass of the send queue from the next. Userspace sets IONIC_V1_FLAG_COLOR and toggles it when prod wraps. Do the same for kernel send queues, and start again at the initial color when a QP reset returns prod to zero. Signed-off-by: Amit Kumar Signed-off-by: Abhijit Gangurde --- drivers/infiniband/hw/ionic/ionic_controlpath.c | 3 +++ drivers/infiniband/hw/ionic/ionic_datapath.c | 4 ++++ drivers/infiniband/hw/ionic/ionic_fw.h | 1 + drivers/infiniband/hw/ionic/ionic_ibdev.h | 1 + 4 files changed, 9 insertions(+) diff --git a/drivers/infiniband/hw/ionic/ionic_controlpath.c b/drivers/infiniband/hw/ionic/ionic_controlpath.c index 00f9086f3bab..1738635bacf4 100644 --- a/drivers/infiniband/hw/ionic/ionic_controlpath.c +++ b/drivers/infiniband/hw/ionic/ionic_controlpath.c @@ -1949,6 +1949,8 @@ static int ionic_qp_sq_init(struct ionic_ibdev *dev, struct ionic_ctx *ctx, return rc; } + qp->sq_color = true; + rc = -EINVAL; if (max_wr < 0 || max_wr > 0xffff) @@ -2662,6 +2664,7 @@ static void ionic_reset_qp(struct ionic_ibdev *dev, struct ionic_qp *qp) qp->sq_msn_cons = 0; qp->sq.prod = 0; qp->sq.cons = 0; + qp->sq_color = true; spin_unlock(&qp->sq_lock); } diff --git a/drivers/infiniband/hw/ionic/ionic_datapath.c b/drivers/infiniband/hw/ionic/ionic_datapath.c index c5726c6bd5cb..422e53e21054 100644 --- a/drivers/infiniband/hw/ionic/ionic_datapath.c +++ b/drivers/infiniband/hw/ionic/ionic_datapath.c @@ -820,6 +820,9 @@ static void ionic_prep_base(struct ionic_qp *qp, wqe->base.wqe_idx = cpu_to_le64(qp->sq.prod); + if (qp->sq_color) + wqe->base.flags |= cpu_to_be16(IONIC_V1_FLAG_COLOR); + if (wr->send_flags & IB_SEND_FENCE) wqe->base.flags |= cpu_to_be16(IONIC_V1_FLAG_FENCE); @@ -843,6 +846,7 @@ static void ionic_prep_base(struct ionic_qp *qp, } ionic_queue_produce(&qp->sq); + qp->sq_color = ionic_color_wrap(qp->sq.prod, qp->sq_color); } static int ionic_prep_common(struct ionic_qp *qp, diff --git a/drivers/infiniband/hw/ionic/ionic_fw.h b/drivers/infiniband/hw/ionic/ionic_fw.h index 1db67fcb9a53..b8e996d4b8b9 100644 --- a/drivers/infiniband/hw/ionic/ionic_fw.h +++ b/drivers/infiniband/hw/ionic/ionic_fw.h @@ -532,6 +532,7 @@ enum ionic_v1_op { IONIC_V1_FLAG_SOL = BIT(1), IONIC_V1_FLAG_INL = BIT(2), IONIC_V1_FLAG_SIG = BIT(3), + IONIC_V1_FLAG_COLOR = BIT(4), /* flags last four bits for sgl spec format */ IONIC_V1_FLAG_SPEC32 = (1u << 12), diff --git a/drivers/infiniband/hw/ionic/ionic_ibdev.h b/drivers/infiniband/hw/ionic/ionic_ibdev.h index f8d580dd4d95..cf4b85355f26 100644 --- a/drivers/infiniband/hw/ionic/ionic_ibdev.h +++ b/drivers/infiniband/hw/ionic/ionic_ibdev.h @@ -306,6 +306,7 @@ struct ionic_qp { u8 sq_cmb; bool sq_flush; bool sq_flush_rcvd; + bool sq_color; struct ionic_rq rq; -- 2.43.0