Re: [RFC PATCH v2 3/4] iommu/riscv: Add guest IMSIC GPA mapping helpers

[Jason Gunthorpe <jgg@nvidia.com>]

On Tue, Oct 27, 2026 at 10:08:37PM +0800, fangyu.yu@linux.alibaba.com wrote:
> >His concern seems to be about who owns and maintains these mappings.
> >When the RISC-V IOMMU driver calls iommu_map directly on a paging
> >domain managed by iommufd, the mappings are not visible to the domain
> >owner. This makes it difficult to handle mapping lifetime and
> >hardware page table replacement correctly.
> >
> 
> Hi Shuai,
> 
> Thanks for the review.
> 
> Before going further, I want to make sure I answer the actual
> question. If the concern is about who owns and maintains these
> mappings, I address that below.
> 
> The iommu_map() and replace_leaf() calls are not a separate
> mapping facility added next to the forwarding code. They are
> two steps in the existing interrupt-forwarding state machine
> driven from iommu-ir.c:
> 
>   - first FORWARD:      flat -> MSIPTE written /
>                         noflat -> S2 PTE installed
>   - UPDATE_TARGET:      flat -> MSIPTE updated /
>                         noflat -> replace_leaf()
>                          (only if the VS-file page moved)
>   - last unforward:     flat -> MSI table deactivated /
>                         noflat -> S2 PTE removed
> 
> So the lifetime of the S2 mapping matches the lifetime of the
> forwarding session, which is the same rule the MSI page table
> already follows. The driver is the only layer that sees both
> the forwarding session (device <-> vCPU) and the paging domain
> used to translate guest MSI writes, so it is also the only
> layer that can maintain this mapping.
> 
> Note that the noflat column of the last row is not in v2: v2
> only frees the bookkeeping when the domain is torn down. In
> v3, I revoke the S2 entries both when the last forwarded IRQ
> in the domain is released and at domain free, so the entry
> lifetime becomes identical to the MSIPTE lifetime.

The big point is interrupt code has to live in an irq_domain, not in
the iommu driver, and the IOVA allocator is not part of either irq or
iommu drivers.

So you have to layer this properly if you are going to even attempt
it. It sounds complicated.

Jason