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Tue, 27 Oct 2026 13:14:33 -0700 From: Chris Babroski To: CC: , , , , , , , , , , , , , , Subject: Re: [PATCH net-next v1 4/5] net: lan743x: reset the device on TX timeout Date: Tue, 27 Oct 2026 16:14:13 -0400 Message-ID: <20261027201413.589706-1-cbabroski@nvidia.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <5cabe797885011ea204a793557d8639a@tipi-net.de> References: <5cabe797885011ea204a793557d8639a@tipi-net.de> X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: rnnvmail202.nvidia.com (10.129.68.7) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM3PEPF000265C0:EE_|PH7PR12MB8177:EE_ X-MS-Office365-Filtering-Correlation-Id: 2ca13be4-3082-4da7-783e-08df3466f6a1 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|23010399003|36860700016|1800799024|376014|7416014|82310400026|10067099003|261022105027099003|261022075727099003|261021121427099003|261021135927099003|56012099006|6133799003|22082099003|18002099003|261026140227099003|11063799006; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: wBGKmr/0JLKhI60sWqa4uylPvFThfVucnN0cdNg5FyLRGZVR3n1EGg/qPjrDmJTb7iWyjeHrMLLTHQcaEaz6wVFGIkTSToD8QqASg2Exm+AX9s821WGHWjIuhCOFPcoozkUMl9j8N/38YsADwdodVI257DLLSg3mGt0UyaaxpNilD/nNx8bSmXTQTu8j+1v6C5XZi0Bs5JoB+sGfgt9JEgrod/CwfJ+gctvHs3f7RHcyk8beTl26Moln9QQBAK2ih6ayqhny5wDwtgxc+osXbrmq7Xz9aqPA0FYZ9lUPBI3I4xw5sUTe+yaY6TPQRLgRaTiAzAFZXfd2TfJp7MYLltTUA55vMz1D8CbIKD4uBDzhNZIjUVzfoLpiOXPo6VknIc1pPzu8tRXJFk0ePH9mT/9mcjQSqWRlBt1mCwwBthTxo80ROXhQFx3o3lnxmE9G X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Oct 2026 20:14:53.7414 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2ca13be4-3082-4da7-783e-08df3466f6a1 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM3PEPF000265C0.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB8177 Hi Nicolai, > Is it ok to re-register the PTP clock on a reset the driver starts by > itself? > > ptp_clock_unregister() makes the open /dev/ptpN return -ENODEV, and > since the old index stays taken while ptp4l holds it, the reopen comes > back as a different /dev/ptpN. So ptp4l has to be restarted, which is > more than "set up timestamping again"... > > How about moving clock registration to probe instead, so it survives > the reset? Then only the hw timestamping config would need to be put > back. It may be best to get Microchip's opinion about how this should be handled. Woojung, can you answer this? Makes sense that moving clock registration to probe and remove would keep the PTP device valid across TX hang reset, but I'm not sure if there are other consequences to PTP still being disabled and re-enabled during reset. I'll update the commit message to be more clear about ptp4l needing to be restarted and try to run some tests to see what the effect is of moving clock registration. > > + ret = lan743x_netdev_open(netdev); > > + if (ret) { > > + netdev_err(netdev, "failed to reopen after reset: %d\n", ret); > > + goto close; > > + } > > Unrelated to this series, but lan743x_pm_resume() seems to ignore this > return value. This issue has been flagged by the Sashiko AI review bot twice as well now. It would not be difficult to add similar error handling to lan743x_pm_resume() so I can add that as a separate small patch when I send the v2 series. Thanks, Chris