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charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20261028-add-is31fl3206-support-v4-2-e331cee9fcb3@amieiro.net> References: <20261028-add-is31fl3206-support-v4-0-e331cee9fcb3@amieiro.net> In-Reply-To: <20261028-add-is31fl3206-support-v4-0-e331cee9fcb3@amieiro.net> To: Lee Jones , Pavel Machek , Griffin Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Flavio Amieiro , linux-leds@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.16.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=4217; i=flavio@amieiro.net; h=from:subject:message-id; bh=ggF/uBK1szjdzvd7JCaF71GxNXOUJv6pNasXUmRFO58=; b=owGbwMvMwCX2bmrBFGnZ5lDG02pJDFmPMo8lLFrycMqHK1KGf5qFzya8MrfmCVG0ZTEysb92I JCrbVZcRykLgxgXg6yYIgtLGUuZd/vB5t3TVkvCzGFlAhnCwMUpABPR1mP4Z+TVqzb5/fSaes5n 363WL+MMeyH/xKPvSc2lNeGHFn61tmFkeOpxOib+QX+W4KTCRw8Vt226c3PyHJGuh/wfjnqn/Fx 0kRUA X-Developer-Key: i=flavio@amieiro.net; a=openpgp; fpr=047604764B87C183BB96AB19EE9570941B1D8355 X-Rspamd-Queue-Id: 4jFLD975gmz8vJ5 This chip has a different layout for the LED Control Register when compared to the other variants. This register contains the enable bit (in the highest nibble) but also the current control (in the lowest nibble). According to the datasheet, a value of 010000 (0x10) in the register enables an LED with the output current set to maximum. This commit adds support for this IC allowing the chipdef to define an offset for the enable bits inside the LED Control Register. The limitation that already existed for other variants is still in this one: all LEDs are enabled and set with maximum current, letting brightness be controlled by the PWM registers. Signed-off-by: Flavio Amieiro --- drivers/leds/leds-is31fl32xx.c | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/drivers/leds/leds-is31fl32xx.c b/drivers/leds/leds-is31fl32xx.c index 285085d27453..586713ff7d98 100644 --- a/drivers/leds/leds-is31fl32xx.c +++ b/drivers/leds/leds-is31fl32xx.c @@ -77,6 +77,7 @@ struct is31fl32xx_priv { * @pwm_registers_reversed: : true if PWM registers count down instead of up * @led_control_register_base : address of first LED control register (optional) * @enable_bits_per_led_control_register: number of LEDs enable bits in each + * @enable_bits_offset_in_led_control_reg: offset of the enable bit in the LED Control Register * @brightness_steps : number of brightness steps supported by the chip * @reset_func : pointer to reset function * @sw_shutdown_func : pointer to software shutdown function @@ -88,6 +89,12 @@ struct is31fl32xx_priv { * necessary registers to a known initialization state. This is needed * for chips that do not have a @reset_reg. * + * @enable_bit_offset_in_led_control_reg determines the offset of the + * enable bits from the least significant bit of the LED control + * register. This is needed for chips that have a LED Control Register + * that control more than simply the enable/disable state of the + * channel such as the IS31FL3206. + * * @enable_bits_per_led_control_register must be >=1 if * @led_control_register_base != %IS31FL32XX_REG_NONE. */ @@ -103,6 +110,7 @@ struct is31fl32xx_chipdef { bool pwm_registers_reversed; u8 led_control_register_base; u8 enable_bits_per_led_control_register; + u8 enable_bits_offset_in_led_control_reg; u16 brightness_steps; int (*reset_func)(struct is31fl32xx_priv *priv); int (*sw_shutdown_func)(struct is31fl32xx_priv *priv, bool enable); @@ -351,6 +359,7 @@ static int is31fl32xx_init_regs(struct is31fl32xx_priv *priv) if (cdef->led_control_register_base != IS31FL32XX_REG_NONE) { u8 value = GENMASK(cdef->enable_bits_per_led_control_register-1, 0); + value = value << cdef->enable_bits_offset_in_led_control_reg; u8 num_regs = cdef->channels / cdef->enable_bits_per_led_control_register; int i; @@ -552,7 +561,22 @@ static const struct is31fl32xx_chipdef is31fl3293_cdef = { .sw_shutdown_func = is31fl3293_software_shutdown, }; +static const struct is31fl32xx_chipdef is31fl3206_cdef = { + .channels = 12, + .shutdown_reg = 0x00, + .pwm_update_reg = 0x13, + .global_control_reg = 0x26, + .reset_reg = 0x2f, + .output_frequency_setting_reg = 0x27, + .pwm_register_base = 0x04, + .led_control_register_base = 0x17, + .enable_bits_per_led_control_register = 1, + .enable_bits_offset_in_led_control_reg = 4, + .brightness_steps = 256, +}; + static const struct of_device_id of_is31fl32xx_match[] = { + { .compatible = "issi,is31fl3206", .data = &is31fl3206_cdef, }, { .compatible = "issi,is31fl3293", .data = &is31fl3293_cdef, }, { .compatible = "issi,is31fl3236", .data = &is31fl3236_cdef, }, { .compatible = "issi,is31fl3236a", .data = &is31fl3236a_cdef, }, @@ -616,6 +640,7 @@ static void is31fl32xx_remove(struct i2c_client *client) * even though it is not used for DeviceTree based instantiation. */ static const struct i2c_device_id is31fl32xx_id[] = { + { .name = "is31fl3206" }, { .name = "is31fl3293" }, { .name = "is31fl3236" }, { .name = "is31fl3236a" }, -- 2.53.0