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Wed, 28 Oct 2026 08:54:11 -0700 (PDT) Received: from z13-ek5.local ([151.40.161.170]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4aa7f3229dbsm1468515e9.1.2026.10.28.08.54.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Oct 2026 08:54:10 -0700 (PDT) From: Ettore Chimenti Date: Wed, 28 Oct 2026 16:53:49 +0100 Subject: [PATCH v2 1/4] clk: ti: fapll: remove ti_dt_clk_name helper X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20261028-patch-ektor5-dm8168-clk-v2-1-dc6bf0fabae4@linaro.org> References: <20261028-patch-ektor5-dm8168-clk-v2-0-dc6bf0fabae4@linaro.org> In-Reply-To: <20261028-patch-ektor5-dm8168-clk-v2-0-dc6bf0fabae4@linaro.org> To: Tero Kristo , Stephen Boyd , Brian Masney , Jerome Brunet , Tony Lindgren , Michael Turquette , Andrew Goodbody , Rouven Czerwinski Cc: linux-omap@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Ettore Chimenti X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1793202849; l=2114; i=ettore.chimenti@linaro.org; s=20261014; h=from:subject:message-id; bh=ABvwyWZf34jMuxGuFGtYQbL5MA+37XtO7nEVwJg9AX8=; b=YsbRHc+3mjXFpWBUFToT1ViSmvk62je91w4y33JIgYo1glSMvV8Hyut13+0E3nQR0ot6/Vib8 hHFXYIkubaHCA35/qWKSTze2o9bnX1QffpmMcOVQPy7jTUM02LM6v8U X-Developer-Key: i=ettore.chimenti@linaro.org; a=ed25519; pk=wCaUblFVaqhuBTQt/hAtysafsAaEsqj/yOD9SPlz6NM= From: Rouven Czerwinski The fapll driver uses multiple `clock-output-names`, so we cannot use the DT helper in this driver because that would assign the first clock output name as the parent name. This change do not affect other SoCs as the only consumer is DM816x. Fixes: 9e56a7d4263c ("clk: ti: Update pll and clockdomain clocks to use ti_dt_clk_name()") Signed-off-by: Rouven Czerwinski Tested-by: Andrew Goodbody Signed-off-by: Ettore Chimenti --- drivers/clk/ti/fapll.c | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) diff --git a/drivers/clk/ti/fapll.c b/drivers/clk/ti/fapll.c index e54b1df3436e..ae2f6fed10f6 100644 --- a/drivers/clk/ti/fapll.c +++ b/drivers/clk/ti/fapll.c @@ -10,8 +10,6 @@ #include #include -#include "clock.h" - /* FAPLL Control Register PLL_CTRL */ #define FAPLL_MAIN_MULT_N_SHIFT 16 #define FAPLL_MAIN_DIV_P_SHIFT 8 @@ -541,7 +539,6 @@ static void __init ti_fapll_setup(struct device_node *node) struct clk_init_data *init = NULL; const char *parent_name[2]; struct clk *pll_clk; - const char *name; int i; fd = kzalloc_obj(*fd); @@ -559,8 +556,7 @@ static void __init ti_fapll_setup(struct device_node *node) goto free; init->ops = &ti_fapll_ops; - name = ti_dt_clk_name(node); - init->name = name; + init->name = node->name; init->num_parents = of_clk_get_parent_count(node); if (init->num_parents != 2) { @@ -592,7 +588,7 @@ static void __init ti_fapll_setup(struct device_node *node) if (fapll_is_ddr_pll(fd->base)) fd->bypass_bit_inverted = true; - fd->name = name; + fd->name = node->name; fd->hw.init = init; /* Register the parent PLL */ @@ -639,7 +635,7 @@ static void __init ti_fapll_setup(struct device_node *node) freq = NULL; } synth_clk = ti_fapll_synth_setup(fd, freq, div, output_instance, - output_name, name, pll_clk); + output_name, node->name, pll_clk); if (IS_ERR(synth_clk)) continue; -- 2.56.0