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Wed, 28 Oct 2026 08:54:11 -0700 (PDT) Received: from z13-ek5.local ([151.40.161.170]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4aa7f3229dbsm1468515e9.1.2026.10.28.08.54.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Oct 2026 08:54:11 -0700 (PDT) From: Ettore Chimenti Date: Wed, 28 Oct 2026 16:53:50 +0100 Subject: [PATCH v2 2/4] clk: ti: fapll: Fix clock speed calculation X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20261028-patch-ektor5-dm8168-clk-v2-2-dc6bf0fabae4@linaro.org> References: <20261028-patch-ektor5-dm8168-clk-v2-0-dc6bf0fabae4@linaro.org> In-Reply-To: <20261028-patch-ektor5-dm8168-clk-v2-0-dc6bf0fabae4@linaro.org> To: Tero Kristo , Stephen Boyd , Brian Masney , Jerome Brunet , Tony Lindgren , Michael Turquette , Andrew Goodbody , Rouven Czerwinski Cc: linux-omap@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Ettore Chimenti X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1793202849; l=1741; i=ettore.chimenti@linaro.org; s=20261014; h=from:subject:message-id; bh=x1G4PpmGAOi/+npgUEN5TSnu9K+yHFni2t7wWOonDiM=; b=Yjdc0rXTYjFcwSZPaRwYiLsrgSjWu0P53QtnentU54j87UaJVPUIW1thUkot8uN64ac5aOGBa K9Elk7a2TEcAmN3v9I9wfdqMAu1wyc9WoZjj+icprs7NJrZ/znzc3x/ X-Developer-Key: i=ettore.chimenti@linaro.org; a=ed25519; pk=wCaUblFVaqhuBTQt/hAtysafsAaEsqj/yOD9SPlz6NM= From: Andrew Goodbody The fractional part of the divider was being treated as 1/10000000 whereas it is in fact 1/2^24 (1/16777216). This led to incorrect clock speeds being reported when a fractional divider was in use. Correct it. As well as fixing the clock speed calculation when read, also update the calculation on set in a similar manner. Fixes: 163152cbbe32 ("clk: ti: Add support for FAPLL on dm816x") Signed-off-by: Andrew Goodbody Signed-off-by: Ettore Chimenti --- drivers/clk/ti/fapll.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/clk/ti/fapll.c b/drivers/clk/ti/fapll.c index ae2f6fed10f6..8ab9acd57b60 100644 --- a/drivers/clk/ti/fapll.c +++ b/drivers/clk/ti/fapll.c @@ -336,8 +336,8 @@ static unsigned long ti_fapll_synth_recalc_rate(struct clk_hw *hw, v = readl_relaxed(synth->freq); synth_int_div = (v >> 24) & 0xf; synth_frac_div = v & 0xffffff; - synth_div_freq = (synth_int_div * 10000000) + synth_frac_div; - rate *= 10000000; + synth_div_freq = (synth_int_div * 16777216) + synth_frac_div; + rate *= 16777216; do_div(rate, synth_div_freq); rate *= SYNTH_PHASE_K; } @@ -378,10 +378,10 @@ static u32 ti_fapll_synth_set_frac_rate(struct fapll_synth *synth, for (; post_div_m < SYNTH_MAX_DIV_M; post_div_m++) { synth_int_div = DIV_ROUND_UP_ULL((u64)parent_rate * SYNTH_PHASE_K * - 10000000, + 16777216, rate * post_div_m); - synth_frac_div = synth_int_div % 10000000; - synth_int_div /= 10000000; + synth_frac_div = synth_int_div % 16777216; + synth_int_div /= 16777216; if (synth_int_div <= SYNTH_MAX_INT_DIV) break; -- 2.56.0