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[129.46.96.20]) by smtp.gmail.com with ESMTPSA id 006d021491bc7-7142bb765a3sm653720eaf.4.2026.10.27.22.20.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Oct 2026 22:20:49 -0700 (PDT) From: Anusha Arun Nandi To: Bryan O'Donoghue Cc: Vinod Koul , Neil Armstrong , Manivannan Sadhasivam , gjorgji.rosikopulos@oss.qualcomm.com, hariram.purushothaman@oss.qualcomm.com, akapatra@quicinc.com, jigarkumar.zala@oss.qualcomm.com, linux-phy@lists.infradead.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2] phy: qcom-mipi-csi2: Add support for single power-domain SoCs Date: Tue, 27 Oct 2026 22:20:47 -0700 Message-Id: <20261028052047.2738893-1-anusha.nandi@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Proofpoint-GUID: c9rm6XQvoz4_5Oq0raq_zUOF4mcyV39Z X-Authority-Analysis: v=2.4 cv=YuGa1IYX c=1 sm=1 tr=0 ts=6ae18632 cx=c_pps a=wURt19dY5n+H4uQbQt9s7g==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_glEPmIy2e8OvE2BGh3C:22 a=EUspDBNiAAAA:8 a=uorg23y0nfgcnAkg4s0A:9 a=-UhsvdU3ccFDOXFxFb4l:22 X-Proofpoint-Spam-Info: AW1haW4tMjYxMDI4MDAyMSBTYWx0ZWRfXxSO1RdAvkzyK BBYCL7R+m6OIDBfWNh4PFN6fi6zLLkubX8X0lmzYkGeOu1rxQSiFRd3ak4rdXu6LUdaivULx+Eu kVCaIePqdWi2GzmFvQe2vG1xAXeZdJY= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDI4MDAyMSBTYWx0ZWRfX9Ipm59YGMF5B vSZhRkwxLwj02Ob6FZpVQkWy4N7RzknlTTdOjMApDtArIx8r5PhhJhxx7Wl+Max5G2NDu+u5Dfb i2/sxlmovJxHtrELsyaXcdrH+C1nyqGXKqc9Bpg2BfHvRndQAzrmZeZF/8vjXP3xDyT3XBjVbix wJNBI7ZpW0Pln3qN8ZO9hyWJq1uNyHacVflUzqIhg44VDnJcmwa5mthhfTjKJuDS73sd9km7P+8 tcvIfD+jKEsGxNttmmLzegMvVvGXM5J95nSoHvnv2WsQbBjub3p59LIKQoexMsF2YjC0qp9UXBI 2DQ8fzPU16scHfKyY46FGz4U7J9w6i9/l4ASZ95rMlGl9DI0HdxDP+1eB9s7cPcplyOr1ZB91u3 rql5Hbfx1Ol7dPOvXRxs0SxDLuf5hQrteoSDwgF5uJpVFNBxBhDjL1BaL9HoQ9vR4Z7tQkLxRHA fUMV49nPOK+JxoO7S0A== X-Proofpoint-ORIG-GUID: c9rm6XQvoz4_5Oq0raq_zUOF4mcyV39Z X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.138,FMLib:17.12.100.49 definitions=2026-10-28_02,2026-10-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 impostorscore=0 phishscore=0 malwarescore=0 suspectscore=0 spamscore=0 lowpriorityscore=0 bulkscore=0 priorityscore=1501 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610190000 definitions=main-2610280021 sa8775p, qcs8300 and sc7280 each list exactly one power-domain ("top") on the CSI2 PHY node. For a device with a single power-domain phandle, the generic platform-bus code (platform_probe() -> dev_pm_domain_attach()) auto-attaches it via genpd_dev_pm_attach() before the driver's own probe() runs. phy_qcom_mipi_csi2_probe() then unconditionally calls devm_pm_domain_attach_list(), which fails with -EEXIST because dev->pm_domain is already set, and the driver treats that as fatal: 1. qcom-mipi-csi2-phy ace6000.phy: error -EEXIST: Failed to attach power-domain list 2. qcom-mipi-csi2-phy ace6000.phy: probe with driver qcom-mipi-csi2-phy failed with error -17 x1e80100 is unaffected: it lists three power-domains, so the generic code does not auto-attach any of them (auto-attach only applies to single-power-domain devices); the driver's explicit attach is the only one that runs. For the single power-domain case, call dev_pm_domain_attach() instead of devm_pm_domain_attach_list(): it returns early when dev->pm_domain is already set, so csi2phy->pd_list is left NULL rather than built up by hand. The three call sites that walk pd_list for genpd performance-state scaling now guard against a NULL pd_list, which is harmless since scaling is unused (scaled = false) on every SoC that has a single "top" domain. Signed-off-by: Anusha Arun Nandi --- drivers/phy/qualcomm/phy-qcom-mipi-csi2-core.c | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-mipi-csi2-core.c b/drivers/phy/qualcomm/phy-qcom-mipi-csi2-core.c index c0a4fa20eaf0..ac25e1e5f1c3 100644 --- a/drivers/phy/qualcomm/phy-qcom-mipi-csi2-core.c +++ b/drivers/phy/qualcomm/phy-qcom-mipi-csi2-core.c @@ -43,7 +43,7 @@ phy_qcom_mipi_csi2_set_clock_rates(struct mipi_csi2phy_device *csi2phy, } pstate = 0; - for (i = 0; i < csi2phy->pd_list->num_pds; i++) { + for (i = 0; csi2phy->pd_list && i < csi2phy->pd_list->num_pds; i++) { unsigned int perf; if (!csi2phy->soc_cfg->genpds[i].scaled) @@ -174,7 +174,7 @@ static int phy_qcom_mipi_csi2_power_on(struct phy *phy) unset_rate: dev_pm_opp_set_rate(csi2phy->dev, 0); - for (i = 0; i < csi2phy->pd_list->num_pds; i++) { + for (i = 0; csi2phy->pd_list && i < csi2phy->pd_list->num_pds; i++) { if (!csi2phy->soc_cfg->genpds[i].scaled) continue; @@ -204,7 +204,7 @@ static int phy_qcom_mipi_csi2_power_off(struct phy *phy) dev_pm_opp_set_rate(csi2phy->dev, 0); - for (i = 0; i < csi2phy->pd_list->num_pds; i++) { + for (i = 0; csi2phy->pd_list && i < csi2phy->pd_list->num_pds; i++) { if (!csi2phy->soc_cfg->genpds[i].scaled) continue; @@ -233,6 +233,10 @@ static int phy_qcom_mipi_csi2_attach_pm_domains(struct mipi_csi2phy_device *csi2 const char **pd_names; int i; + /* Single power-domain devices are already attached by the bus core. */ + if (csi2phy->soc_cfg->num_genpds == 1) + return dev_pm_domain_attach(csi2phy->dev, 0); + pd_names = devm_kzalloc(csi2phy->dev, sizeof(char *) * csi2phy->soc_cfg->num_genpds, GFP_KERNEL); @@ -369,11 +373,8 @@ static int phy_qcom_mipi_csi2_probe(struct platform_device *pdev) return ret; ret = phy_qcom_mipi_csi2_attach_pm_domains(csi2phy); - if (ret < 0 || csi2phy->pd_list == NULL) { - if (ret == 0) - ret = -ENODEV; + if (ret < 0) return dev_err_probe(dev, ret, "Failed to attach power-domain list\n"); - } ret = devm_pm_runtime_enable(dev); if (ret < 0) -- 2.34.1