From: Fuad Tabba <fuad.tabba@linux.dev>
To: Marc Zyngier <maz@kernel.org>, Oliver Upton <oupton@kernel.org>,
kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org
Cc: Joey Gouly <joey.gouly@arm.com>,
Steffen Eiden <seiden@linux.ibm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Zenghui Yu <yuzenghui@huawei.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Vincent Donnefort <vdonnefort@google.com>,
kernel-team@android.com, linux-kernel@vger.kernel.org,
Oculytic <oculytic@gmail.com>, Fuad Tabba <tabba@google.com>
Subject: [PATCH v2 3/3] KVM: arm64: Disable host PMU counters for protected guests
Date: Wed, 28 Oct 2026 11:07:39 +0000 [thread overview]
Message-ID: <20261028110739.2366566-4-fuad.tabba@linux.dev> (raw)
In-Reply-To: <20261028110739.2366566-1-fuad.tabba@linux.dev>
A protected guest has no PMU, and EL2 clears MDCR_EL2.HPME for it.
However, HPME has no effect, since __pkvm_vcpu_load() sets HPMN to cover
every event counter, and HPME never covers the cycle or instruction
counter. The counters the host has enabled therefore keep counting the
guest.
Stop them in the world switch while a protected guest runs, reading
PMCNTENSET_EL0 rather than trusting the host-controlled events mask.
Gate this on system_supports_pmuv3(), as __activate_traps_common() does
for PMUSERENR_EL0.
Side channels are outside pKVM's threat model, so this is hardening
rather than a fix.
Reported-by: Oculytic <oculytic@gmail.com>
Signed-off-by: Fuad Tabba <fuad.tabba@linux.dev>
---
arch/arm64/kvm/hyp/nvhe/switch.c | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/arch/arm64/kvm/hyp/nvhe/switch.c b/arch/arm64/kvm/hyp/nvhe/switch.c
index 91e1edf40bcd2..f602154ab49b5 100644
--- a/arch/arm64/kvm/hyp/nvhe/switch.c
+++ b/arch/arm64/kvm/hyp/nvhe/switch.c
@@ -175,6 +175,26 @@ static void __pmu_switch_to_host(struct kvm_vcpu *vcpu)
#define __pmu_switch_to_host(v) do {} while (0)
#endif
+static u64 __pmu_stop_host_counters(struct kvm_vcpu *vcpu)
+{
+ u64 pmcnten;
+
+ if (!vcpu_is_protected(vcpu) || !system_supports_pmuv3())
+ return 0;
+
+ pmcnten = read_sysreg(pmcntenset_el0);
+ if (pmcnten)
+ write_sysreg(pmcnten, pmcntenclr_el0);
+
+ return pmcnten;
+}
+
+static void __pmu_restore_host_counters(u64 pmcnten)
+{
+ if (pmcnten)
+ write_sysreg(pmcnten, pmcntenset_el0);
+}
+
/*
* Handler for protected VM MSR, MRS or System instruction execution in AArch64.
*
@@ -282,6 +302,7 @@ int __kvm_vcpu_run(struct kvm_vcpu *vcpu)
struct kvm_cpu_context *guest_ctxt;
struct kvm_s2_mmu *mmu;
bool pmu_switch_needed;
+ u64 host_pmcnten;
u64 exit_code;
/*
@@ -300,6 +321,7 @@ int __kvm_vcpu_run(struct kvm_vcpu *vcpu)
guest_ctxt = &vcpu->arch.ctxt;
pmu_switch_needed = __pmu_switch_to_guest(vcpu);
+ host_pmcnten = __pmu_stop_host_counters(vcpu);
__sysreg_save_state_nvhe(host_ctxt);
/*
@@ -384,6 +406,8 @@ int __kvm_vcpu_run(struct kvm_vcpu *vcpu)
if (pmu_switch_needed)
__pmu_switch_to_host(vcpu);
+ __pmu_restore_host_counters(host_pmcnten);
+
/* Returning to host will clear PSR.I, remask PMR if needed */
if (system_uses_irq_prio_masking())
gic_write_pmr(GIC_PRIO_IRQOFF);
--
2.47.3
next prev parent reply other threads:[~2026-10-28 11:07 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-28 11:07 [PATCH v2 0/3] KVM: arm64: Fix PMU handling in pKVM Fuad Tabba
2026-10-28 11:07 ` [PATCH v2 1/3] KVM: arm64: Synchronise kvm_host_data before host deprivileging Fuad Tabba
2026-10-28 11:07 ` [PATCH v2 2/3] KVM: arm64: Pass the PMU events to the hyp vCPU of non-protected guests Fuad Tabba
2026-10-28 11:07 ` Fuad Tabba [this message]
2026-10-28 12:52 ` [PATCH v2 3/3] KVM: arm64: Disable host PMU counters for protected guests Marc Zyngier
2026-10-28 13:27 ` Fuad Tabba
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