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This flash uses 6 dummy cycles by default in 1-4-4 DTR mode. For 1S-4D-4D, its support bit is located in the 21st DWORD of the BFPT table, while the dummy cycles are described in the 23rd DWORD. Unfortunately, the BFPT of this flash model currently only supports 16 DWORDs, and the kernel's SFDP parser does not derive any SNOR_HWCAPS_READ_1_4_4_DTR capability from the BFPT table. Therefore, implement late_init to initialize support for this opcode, configuring the read settings with the default 6 dummy cycles. The SFDP of this part provides a 4BAIT table, which also advertises the 4-byte 1-4-4 DTR opcode (0xEE). SFDP parsing converts the read opcodes to their 4-byte variants and spi_nor_set_4byte_opcodes() is skipped later on, but the 1-4-4 DTR read is only added in late_init, after 4BAIT has been parsed, so it is not converted there. Select the 4-byte opcode directly in that case. Also set SPI_NOR_4B_OPCODES like MX66L51235F (0xc2 0x20 0x1a). The part supports the 4-byte opcode set, so if 4BAIT parsing does not complete, spi_nor_set_4byte_opcodes() still picks the 4-byte variants, including 0xEE for 1-4-4 DTR. With 4BAIT parsed, as on the tested part, the flag has no further effect. Add a dedicated fixup for the part (SNOR_ID 0xc2, 0x20, 0x1b) that keeps the existing QPP 4-byte post-SFDP fixup and additionally advertises the 1-4-4 DTR read capability in late_init. Signed-off-by: Changhuang Liang Reviewed-by: Miquel Raynal --- Logs for MX66L1G45G: ******************** + cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id c2201b + cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer macronix + xxd -p /sys/bus/spi/devices/spi0.0/spi-nor/sfdp 53464450060102ff00060110300000ffc2000104100100ff84000102c000 00ffffffffffffffffffffffffffffffffffe520fbffffffff3f44eb086b 083b04bbfeffffffffff00ffffff44eb0c200f5210d800ffd649c50085df 04e34403673830b030b0f7bdd55c4a9e29fff050f985ffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffff7fefffff215cdcffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffff003600279df9c06485cbffffffffffff + sha256sum /sys/bus/spi/devices/spi0.0/spi-nor/sfdp bec91ac20c9f7c63a00992fd2f779f8c5378d8f9afc699a2c741be5bdf268e35 /sys/bus/spi/devices/spi0.0/spi-nor/sfdp + cat /sys/kernel/debug/spi-nor/spi0.0/capabilities Supported read modes by the flash 1S-1S-1S opcode 0x13 mode cycles 0 dummy cycles 0 1S-1S-2S opcode 0x3c mode cycles 0 dummy cycles 8 1S-2S-2S opcode 0xbc mode cycles 0 dummy cycles 4 1S-1S-4S opcode 0x6c mode cycles 0 dummy cycles 8 1S-4S-4S opcode 0xec mode cycles 2 dummy cycles 4 4S-4S-4S opcode 0xec mode cycles 2 dummy cycles 4 1S-4D-4D opcode 0xee mode cycles 0 dummy cycles 6 Supported page program modes by the flash 1S-1S-1S opcode 0x12 1S-1S-4S opcode 0x34 1S-4S-4S opcode 0x3e 1S-1S-8S opcode 0x84 1S-8S-8S opcode 0x8e + cat /sys/kernel/debug/spi-nor/spi0.0/params name (null) id c2 20 1b c2 20 1b size 128 MiB write size 1 page size 256 address nbytes 4 flags 4B_OPCODES | HAS_4BAIT | SOFT_RESET opcodes read 0xee dummy cycles 6 erase 0x21 program 0x3e SR1 read 0x05 SR1 write 0x01 QE SR1 bit 6 8D extension none protocols read 1S-4D-4D write 1S-4S-4S register 1S-1S-1S erase commands 21 (4.00 KiB) [1] 5c (32.0 KiB) [2] dc (64.0 KiB) [3] c7 (128 MiB) sector map region (in hex) | erase mask | overlaid ------------------+------------+--------- 00000000-07ffffff | [ 1 ] | no + mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + hexdump spi_read 0000000 ffff ffff ffff ffff ffff ffff ffff ffff * 0200000 + sha256sum spi_read 4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read + dd 'if=/dev/urandom' 'of=./spi_test' 'bs=1M' 'count=2' 2+0 records in 2+0 records out + mtd_debug write /dev/mtd0 0 2097152 spi_test Copied 2097152 bytes from spi_test to address 0x00000000 in flash + mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read + sha256sum spi_read spi_test 4e6069fe661b4f2ad8b96620641219cd9b34758e1b5d8585af867ff9ab4c349c spi_read 4e6069fe661b4f2ad8b96620641219cd9b34758e1b5d8585af867ff9ab4c349c spi_test + mtd_debug info /dev/mtd0 mtd.type = MTD_NORFLASH mtd.flags = MTD_CAP_NORFLASH mtd.size = 134217728 (128M) mtd.erasesize = 4096 (4K) mtd.writesize = 1 mtd.oobsize = 0 regions = 0 --- drivers/mtd/spi-nor/macronix.c | 28 +++++++++++++++++++++++++++- 1 file changed, 27 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/spi-nor/macronix.c b/drivers/mtd/spi-nor/macronix.c index b3fdb4b2fa1c..3401275f096b 100644 --- a/drivers/mtd/spi-nor/macronix.c +++ b/drivers/mtd/spi-nor/macronix.c @@ -103,6 +103,26 @@ mx25l12805d_4pp3b_post_sfdp_fixups(struct spi_nor *nor) return 0; } +static int mx66l1g45g_late_init_fixups(struct spi_nor *nor) +{ + struct spi_nor_flash_parameter *params = nor->params; + u8 opcode = SPINOR_OP_READ_1_4_4_DTR; + + /* + * When a 4BAIT table is present, SFDP parsing already converted all + * read opcodes to their 4-byte variants and spi_nor_set_4byte_opcodes() + * is skipped later on, so select the 4-byte opcode here. + */ + if (params->flags & SNOR_F_HAS_4BAIT) + opcode = SPINOR_OP_READ_1_4_4_DTR_4B; + + params->hwcaps.mask |= SNOR_HWCAPS_READ_1_4_4_DTR; + spi_nor_set_read_settings(¶ms->reads[SNOR_CMD_READ_1_4_4_DTR], + 0, 6, opcode, SNOR_PROTO_1_4_4_DTR); + + return 0; +} + static const struct spi_nor_fixups mx25l25635_fixups = { .post_bfpt = mx25l25635_post_bfpt_fixups, .post_sfdp = macronix_qpp4b_post_sfdp_fixups, @@ -120,6 +140,11 @@ static const struct spi_nor_fixups mx25l12805d_4pp3b_fixups = { .post_sfdp = mx25l12805d_4pp3b_post_sfdp_fixups, }; +static const struct spi_nor_fixups mx66l1g45g_fixups = { + .post_sfdp = macronix_qpp4b_post_sfdp_fixups, + .late_init = mx66l1g45g_late_init_fixups, +}; + static const struct flash_info macronix_nor_parts[] = { { .id = SNOR_ID(0xc2, 0x20, 0x10), @@ -355,7 +380,8 @@ static const struct spi_nor_fixup macronix_fixups[] = { { .id = SNOR_ID(0xc2, 0x20, 0x19), .fixups = &mx25l25635_fixups }, { .id = SNOR_ID(0xc2, 0x20, 0x1a), .fixups = ¯onix_qpp4b_fixups, .fixup_flags = SPI_NOR_4B_OPCODES }, - { .id = SNOR_ID(0xc2, 0x20, 0x1b), .fixups = ¯onix_qpp4b_fixups }, + { .id = SNOR_ID(0xc2, 0x20, 0x1b), .fixups = &mx66l1g45g_fixups, + .fixup_flags = SPI_NOR_4B_OPCODES }, { .id = SNOR_ID(0xc2, 0x20, 0x1c), .fixups = ¯onix_qpp4b_fixups }, { .id = SNOR_ID(0xc2, 0x25, 0x3a), .fixups = ¯onix_qpp4b_fixups }, { .id = SNOR_ID(0xc2, 0x25, 0x3b), .fixups = ¯onix_qpp4b_fixups }, -- 2.25.1