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Wed, 28 Oct 2026 09:04:07 -0700 (PDT) Received: from localhost.localdomain ([190.177.146.128]) by smtp.gmail.com with ESMTPSA id a1e0cc1a2514c-991259db2d3sm6354565241.6.2026.10.28.09.04.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Oct 2026 09:04:06 -0700 (PDT) From: Cristian Papa To: cjd@cjdns.fr Cc: netdev@vger.kernel.org, andrew@lunn.ch, olteanv@gmail.com, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, chester.a.unal@arinc9.com, daniel@makrotopia.org, linux@armlinux.org.uk, arinc.unal@arinc9.com, Landen.Chao@mediatek.com, dqfext@gmail.com, sean.wang@mediatek.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, naseefkm@gmail.com, b.larsson@gmx.com Subject: Re: [PATCH v3 0/7] net: dsa: mt7530: support EcoNet EN751221 Date: Wed, 28 Oct 2026 13:03:53 -0300 Message-ID: <20261028160353.4239-1-pcristian292@gmail.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20261028011317.1557238-1-cjd@cjdns.fr> References: <20261028011317.1557238-1-cjd@cjdns.fr> X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Hi Caleb, I tested v3 on a TP-Link Archer XR500v v1 (EN7526G: on-die switch plus the MCM gigabit switch). Setup: OpenWrt with kernel 6.18.44. I took the four mt7530 files from econet_eth at 3a8bcd2e6398 (they contain every line added by 1/7, 3/7, 4/7, 5/7 and 7/7 of v3) and booted from RAM over TFTP, nothing written to flash. With the DT from en751221g.dtsi in openwrt#25330 (MCM "econet,en751221", no "mediatek,mcm", dsa,member <0 1> on the on-die switch and <0 0> on the MCM): - 18/18 boots: all 10 TRGMII lanes found a window, no "calibration failed", "TRGMII inter-switch link initialized", DSA tree set up, ping over lan4. - The chosen taps were stable across boots (+/-1): SoC->MCM 15-22, MCM->SoC 27-29. In the SoC->MCM direction the window always starts at tap 0. - 6 of those boots ran iperf3 for 6 s each way through lan4: 0 RX CRC errors on on-die port 5 (~1.05M frames) and on MCM port 6 (~1.29M frames). In 4 of 10 boots MCM port 6 already had 1 CRC error before any traffic, probably from the calibration; it did not grow. Following the binding in 6/7, the MCM does not come up on this board: - "econet,en751221-gswitch": mt7530-mdio.c in 7/7 still matches "econet,en751221", so nothing probes the MCM and there are no LAN ports. - "mediatek,mcm", which the binding requires for -gswitch: the probe fails with "Couldn't get our reset line", since nothing provides an "mcm" reset yet (the TODO in en751221g.dtsi). So I think 7/7 should match the new compatible, and the binding should not require "mediatek,mcm" while there is no "mcm" reset for the EN751221. Not covered yet: cold boots, and the other LAN ports beyond link-up on lan3/lan4. I'm happy to give a Tested-by once the compatible strings line up, and to rerun anything you'd like; the full boot logs are available. Thanks, Cristian