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Thu, 29 Oct 2026 08:41:53 -0500 From: Colin Huang Date: Thu, 29 Oct 2026 21:38:41 +0800 Subject: [PATCH v10 12/16] ARM: dts: aspeed: anacapa: Add NCT7363 fan controllers X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-ID: <20261029-anacapa-devlop-phase-devicetree-v10-12-26ee3cf9d9d0@gmail.com> References: <20261029-anacapa-devlop-phase-devicetree-v10-0-26ee3cf9d9d0@gmail.com> In-Reply-To: <20261029-anacapa-devlop-phase-devicetree-v10-0-26ee3cf9d9d0@gmail.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joel Stanley , "Andrew Jeffery" , Ryan Chen , Billy Tsai CC: , , , , , Colin Huang , Carl Lee X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1793281119; l=3004; i=u8813345@gmail.com; s=20260202; h=from:subject:message-id; bh=EoPr1aSRvbTxwXKGNXjM5OoMC9gmzjxA/4Buu1Z8hh4=; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: +IQsBnKgN2tmhS0YlqwzfklK28Vf70x3URMrvkHdeSkapueStmsfWDPgrsD6VfafeV5/R/K2tQGACQE8uvu5Stuv3eMFJ0iaH6md8s03rrUw9S9I2oPH8+TLvjeYUIOBHSaKIWyTy15zItIbMCcegK1s5EKWHD1atp0/rn1JgYiKO1JR/ullfsTFGpOCo6yZMa72ziNwMYDL9d7uXcOaO33kXCjP6/RS7QOKIz4V2OwE+9I5Jd1pvLjk8Kkm+siMdhy5h9OoJc9/2W84Mh2BR2o+UxkTbVSpnTr620YTxNScZW0p7T71Gi9pGcMb2S72uDvEjzVjJ77wxGTTqBUGzx9VyvkkNK7ki+ZcN0bVUL6rdCZA2WQZId8HvoLexQPUrkePXPgJj3GiQAoWvLy0Higqd9japK4NbfBhK3FuGEcPHLPRg661IpMdH1KrXARl X-OriginatorOrg: amdcloud.onmicrosoft.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 29 Oct 2026 13:42:14.1539 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 540957aa-cd16-4b08-ec16-08df35c270ca X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: PH3PEPF00059619.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ2PR12MB8881 From: Carl Lee Add two NCT7363 fan-controller nodes on Anacapa I2C mux channels and define their PWM/tach channel mappings. This matches the fan-control hardware layout and allows the kernel to probe the correct fan-controller devices. Signed-off-by: Carl Lee --- .../aspeed/aspeed-bmc-facebook-anacapa-evt2.dtsi | 102 +++++++++++++++++++++ 1 file changed, 102 insertions(+) diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt2.dtsi b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt2.dtsi index 5f849bd21fe0..f546a7b5786a 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt2.dtsi +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt2.dtsi @@ -25,6 +25,52 @@ &i2c8 { i2c-mux@72 { i2c@0 { + fanctl1: fan-controller@21 { + compatible = "nuvoton,nct7363"; + reg = <0x21>; + #pwm-cells = <2>; + + fan-0 { + pwms = <&fanctl1 6 40000>; + tach-ch = /bits/ 8 <0x00>; + }; + + fan-2 { + pwms = <&fanctl1 9 40000>; + tach-ch = /bits/ 8 <0x02>; + }; + + fan-3 { + pwms = <&fanctl1 9 40000>; + tach-ch = /bits/ 8 <0x03>; + }; + + fan-5 { + pwms = <&fanctl1 12 40000>; + tach-ch = /bits/ 8 <0x05>; + }; + + fan-6 { + pwms = <&fanctl1 12 40000>; + tach-ch = /bits/ 8 <0x06>; + }; + + fan-9 { + pwms = <&fanctl1 0 40000>; + tach-ch = /bits/ 8 <0x09>; + }; + + fan-10 { + pwms = <&fanctl1 0 40000>; + tach-ch = /bits/ 8 <0x0a>; + }; + + fan-15 { + pwms = <&fanctl1 6 40000>; + tach-ch = /bits/ 8 <0x0f>; + }; + }; + gpio@24 { gpio-line-names = "RPDB_EAM2_PRSNT_MOS_N_R", "RPDB_EAM3_PRSNT_MOS_N_R", @@ -64,6 +110,62 @@ power-monitor@45 { }; i2c@1 { + fanctl0: fan-controller@23 { + compatible = "nuvoton,nct7363"; + reg = <0x23>; + #pwm-cells = <2>; + + fan-0 { + pwms = <&fanctl0 6 40000>; + tach-ch = /bits/ 8 <0x00>; + }; + + fan-2 { + pwms = <&fanctl0 9 40000>; + tach-ch = /bits/ 8 <0x02>; + }; + + fan-3 { + pwms = <&fanctl0 9 40000>; + tach-ch = /bits/ 8 <0x03>; + }; + + fan-5 { + pwms = <&fanctl0 12 40000>; + tach-ch = /bits/ 8 <0x05>; + }; + + fan-6 { + pwms = <&fanctl0 12 40000>; + tach-ch = /bits/ 8 <0x06>; + }; + + fan-9 { + pwms = <&fanctl0 0 40000>; + tach-ch = /bits/ 8 <0x09>; + }; + + fan-10 { + pwms = <&fanctl0 0 40000>; + tach-ch = /bits/ 8 <0x0a>; + }; + + fan-12 { + pwms = <&fanctl0 3 40000>; + tach-ch = /bits/ 8 <0x0c>; + }; + + fan-13 { + pwms = <&fanctl0 3 40000>; + tach-ch = /bits/ 8 <0x0d>; + }; + + fan-15 { + pwms = <&fanctl0 6 40000>; + tach-ch = /bits/ 8 <0x0f>; + }; + }; + gpio@24 { gpio-line-names = "LPDB_P50V_FAN0_R2_PG","LPDB_P50V_FAN1_R2_PG", -- 2.34.1