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Thu, 29 Oct 2026 08:41:37 -0500 Received: from [127.0.1.1] (10.180.168.240) by satlexmb07.amd.com (10.181.42.216) with Microsoft SMTP Server id 15.2.2562.53 via Frontend Transport; Thu, 29 Oct 2026 08:41:34 -0500 From: Colin Huang Date: Thu, 29 Oct 2026 21:38:35 +0800 Subject: [PATCH v10 06/16] ARM: dts: aspeed: anacapa: Align PDB fan GPIO numbering X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-ID: <20261029-anacapa-devlop-phase-devicetree-v10-6-26ee3cf9d9d0@gmail.com> References: <20261029-anacapa-devlop-phase-devicetree-v10-0-26ee3cf9d9d0@gmail.com> In-Reply-To: <20261029-anacapa-devlop-phase-devicetree-v10-0-26ee3cf9d9d0@gmail.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joel Stanley , "Andrew Jeffery" , Ryan Chen , Billy Tsai CC: , , , , , Colin Huang , Rex Fu X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 9x5H+PxJNsTXZGvHgiMRn5TNxDuXwsXOSH5DdRmvvMQilJBMTSBpq29rpQve/tjdGRBbokhxMGT7nbt3v7+4d/jnfMvLuo2HluWza9N9zkcSKmSz8dVxktbNOYqRIZ7MbHJ0FHeY582cszaq49u8FbOmukKe2MDWAOem3Gmj6fm8oCpoPGQoXevvV/f0oEsveiUMaNwYFRSNb4+U4R3+fl/1aJ+YsZ3EYBbLAwC1y/OE3VXa1pherADXLC98TRs9eAlM1vAe+bKz1gtrc/1cskWxDwuUZdbPnj1TRwFMdsY20jR/IUUCn9Tv9xXAmz7HpP3655gDwH31ZTPZ52K44X12YAztd6SEhphf1AQJH0VqIrLRqEm99t0SDzmreScu6GYEZyNlvVxg+FYO4sVzHP9Yy9QXZ1njh5uWX85nixV/EkUH8pu5czhE//q3N4KU X-OriginatorOrg: amdcloud.onmicrosoft.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 29 Oct 2026 13:41:37.9714 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ce5d08fb-0c9e-4d32-c6a7-08df35c25b41 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: PH3PEPF0005961C.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR12MB4136 From: Rex Fu Update the LPDB and RPDB fan GPIO line names to align with the platform fan numbering scheme. The LPDB fan GPIOs are named FAN0 through FAN4, while the RPDB fan GPIOs are named FAN5 through FAN8. This keeps the GPIO line names consistent with the fan inventory and platform-level fan numbering. Signed-off-by: Rex Fu --- .../aspeed/aspeed-bmc-facebook-anacapa-evt2.dtsi | 34 ++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt2.dtsi b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt2.dtsi index a2392f684b80..3ea5d67865d4 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt2.dtsi +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt2.dtsi @@ -2,6 +2,40 @@ #include "aspeed-bmc-facebook-anacapa-evt1.dtsi" +// MB - PDB +&i2c8 { + i2c-mux@72 { + i2c@0 { + gpio@24 { + gpio-line-names = + "RPDB_EAM2_PRSNT_MOS_N_R", "RPDB_EAM3_PRSNT_MOS_N_R", + "RPDB_PWRGD_P50V_HSC4_SYS_R", + "RPDB_PWRGD_P50V_STBY_SYS_BUF_R", + "RPDB_P50V_FAN5_R2_PG", "RPDB_P50V_FAN6_R2_PG", + "RPDB_P50V_FAN7_R2_PG", "RPDB_P50V_FAN8_R2_PG", + "", "RPDB_FAN5_PRSNT_N_R", + "", "RPDB_FAN6_PRSNT_N_R", + "RPDB_FAN7_PRSNT_N_R", "RPDB_FAN8_PRSNT_N_R", + "", ""; + }; + }; + + i2c@1 { + gpio@24 { + gpio-line-names = + "LPDB_P50V_FAN0_R2_PG","LPDB_P50V_FAN1_R2_PG", + "LPDB_P50V_FAN2_R2_PG","LPDB_P50V_FAN3_R2_PG", + "LPDB_P50V_FAN4_R2_PG","LPDB_FAN0_PRSNT_N_R", + "LPDB_FAN1_PRSNT_N_R","LPDB_FAN2_PRSNT_N_R", + "LPDB_FAN3_PRSNT_N_R","LPDB_FAN4_PRSNT_N_R", + "","", + "","", + "",""; + }; + }; + }; +}; + // SCM &i2c9 { // SCM FRU -- 2.34.1