From: Xilin Wu <sophon@radxa.com>
To: Bjorn Helgaas <bhelgaas@google.com>,
Andrzej Hajda <andrzej.hajda@intel.com>,
Neil Armstrong <neil.armstrong@linaro.org>,
Robert Foss <rfoss@kernel.org>,
Laurent Pinchart <Laurent.pinchart@ideasonboard.com>,
Jonas Karlman <jonas@kwiboo.se>,
Jernej Skrabec <jernej.skrabec@gmail.com>,
Luca Ceresoli <luca.ceresoli@bootlin.com>,
David Airlie <airlied@gmail.com>,
Simona Vetter <simona@ffwll.ch>,
Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
Maxime Ripard <mripard@kernel.org>,
Thomas Zimmermann <tzimmermann@suse.de>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Bartosz Golaszewski <brgl@kernel.org>,
Linus Walleij <linusw@kernel.org>,
Abel Vesa <abelvesa@kernel.org>
Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org,
Stephen Chen <stephen@radxa.com>, Junhao Xie <bigfoot@radxa.com>,
dragon@radxa.com, Xilin Wu <sophon@radxa.com>
Subject: [PATCH v3 1/4] arm64: dts: qcom: sc8280xp: enable PCIe ECAM and 64-bit memory
Date: Thu, 29 Oct 2026 17:44:28 +0800 [thread overview]
Message-ID: <20261029-q8b-dts-v3-1-655696dfec45@radxa.com> (raw)
In-Reply-To: <20261029-q8b-dts-v3-0-655696dfec45@radxa.com>
Enable ECAM to avoid reprogramming iATU on every downstream configuration
access, reducing latency and CPU utilization. Add 64-bit memory windows
for devices with large BARs, such as discrete GPUs.
Preserve the SA8540P PCIe2a and PCIe3a address maps to avoid regressions
due to firmware differences.
Signed-off-by: Xilin Wu <sophon@radxa.com>
---
arch/arm64/boot/dts/qcom/sa8540p.dtsi | 9 +++++++++
arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 25 +++++++++++++++----------
2 files changed, 24 insertions(+), 10 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sa8540p.dtsi b/arch/arm64/boot/dts/qcom/sa8540p.dtsi
index 23888029cc11..e5393a237497 100644
--- a/arch/arm64/boot/dts/qcom/sa8540p.dtsi
+++ b/arch/arm64/boot/dts/qcom/sa8540p.dtsi
@@ -180,6 +180,15 @@ &gpu_smmu {
&pcie2a {
compatible = "qcom,pcie-sa8540p";
+ reg = <0x0 0x01c20000 0x0 0x3000>,
+ <0x0 0x3c000000 0x0 0xf1d>,
+ <0x0 0x3c000f20 0x0 0xa8>,
+ <0x0 0x3c001000 0x0 0x1000>,
+ <0x0 0x3c100000 0x0 0x100000>,
+ <0x0 0x01c23000 0x0 0x1000>;
+
+ ranges = <0x01000000 0x0 0x00000000 0x0 0x3c200000 0x0 0x100000>,
+ <0x02000000 0x0 0x3c300000 0x0 0x3c300000 0x0 0x1d00000>;
linux,pci-domain = <0>;
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
index d17475c3e66c..0c4abf60d1d2 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
@@ -2161,13 +2161,14 @@ pcie4: pcie@1c00000 {
<0x0 0x30000000 0x0 0xf1d>,
<0x0 0x30000f20 0x0 0xa8>,
<0x0 0x30001000 0x0 0x1000>,
- <0x0 0x30100000 0x0 0x100000>,
+ <0x4 0x00000000 0x0 0x10000000>,
<0x0 0x01c03000 0x0 0x1000>;
reg-names = "parf", "dbi", "elbi", "atu", "config", "mhi";
#address-cells = <3>;
#size-cells = <2>;
ranges = <0x01000000 0x0 0x00000000 0x0 0x30200000 0x0 0x100000>,
- <0x02000000 0x0 0x30300000 0x0 0x30300000 0x0 0x1d00000>;
+ <0x02000000 0x0 0x40000000 0x4 0x10000000 0x0 0x10000000>,
+ <0x03000000 0x4 0x20000000 0x4 0x20000000 0x0 0x20000000>;
bus-range = <0x00 0xff>;
dma-coherent;
@@ -2273,13 +2274,14 @@ pcie3b: pcie@1c08000 {
<0x0 0x32000000 0x0 0xf1d>,
<0x0 0x32000f20 0x0 0xa8>,
<0x0 0x32001000 0x0 0x1000>,
- <0x0 0x32100000 0x0 0x100000>,
+ <0x4 0x40000000 0x0 0x10000000>,
<0x0 0x01c0b000 0x0 0x1000>;
reg-names = "parf", "dbi", "elbi", "atu", "config", "mhi";
#address-cells = <3>;
#size-cells = <2>;
ranges = <0x01000000 0x0 0x00000000 0x0 0x32200000 0x0 0x100000>,
- <0x02000000 0x0 0x32300000 0x0 0x32300000 0x0 0x1d00000>;
+ <0x02000000 0x0 0x40000000 0x4 0x50000000 0x0 0x10000000>,
+ <0x03000000 0x4 0x60000000 0x4 0x60000000 0x0 0x20000000>;
bus-range = <0x00 0xff>;
dma-coherent;
@@ -2383,13 +2385,14 @@ pcie3a: pcie@1c10000 {
<0x0 0x34000000 0x0 0xf1d>,
<0x0 0x34000f20 0x0 0xa8>,
<0x0 0x34001000 0x0 0x1000>,
- <0x0 0x34100000 0x0 0x100000>,
+ <0x4 0x80000000 0x0 0x10000000>,
<0x0 0x01c13000 0x0 0x1000>;
reg-names = "parf", "dbi", "elbi", "atu", "config", "mhi";
#address-cells = <3>;
#size-cells = <2>;
ranges = <0x01000000 0x0 0x00000000 0x0 0x34200000 0x0 0x100000>,
- <0x02000000 0x0 0x34300000 0x0 0x34300000 0x0 0x1d00000>;
+ <0x02000000 0x0 0x40000000 0x4 0x90000000 0x0 0x10000000>,
+ <0x03000000 0x4 0xa0000000 0x4 0xa0000000 0x0 0x20000000>;
bus-range = <0x00 0xff>;
dma-coherent;
@@ -2496,13 +2499,14 @@ pcie2b: pcie@1c18000 {
<0x0 0x38000000 0x0 0xf1d>,
<0x0 0x38000f20 0x0 0xa8>,
<0x0 0x38001000 0x0 0x1000>,
- <0x0 0x38100000 0x0 0x100000>,
+ <0x4 0xc0000000 0x0 0x10000000>,
<0x0 0x01c1b000 0x0 0x1000>;
reg-names = "parf", "dbi", "elbi", "atu", "config", "mhi";
#address-cells = <3>;
#size-cells = <2>;
ranges = <0x01000000 0x0 0x00000000 0x0 0x38200000 0x0 0x100000>,
- <0x02000000 0x0 0x38300000 0x0 0x38300000 0x0 0x1d00000>;
+ <0x02000000 0x0 0x40000000 0x4 0xd0000000 0x0 0x10000000>,
+ <0x03000000 0x4 0xe0000000 0x4 0xe0000000 0x0 0x20000000>;
bus-range = <0x00 0xff>;
dma-coherent;
@@ -2606,13 +2610,14 @@ pcie2a: pcie@1c20000 {
<0x0 0x3c000000 0x0 0xf1d>,
<0x0 0x3c000f20 0x0 0xa8>,
<0x0 0x3c001000 0x0 0x1000>,
- <0x0 0x3c100000 0x0 0x100000>,
+ <0x5 0x00000000 0x0 0x10000000>,
<0x0 0x01c23000 0x0 0x1000>;
reg-names = "parf", "dbi", "elbi", "atu", "config", "mhi";
#address-cells = <3>;
#size-cells = <2>;
ranges = <0x01000000 0x0 0x00000000 0x0 0x3c200000 0x0 0x100000>,
- <0x02000000 0x0 0x3c300000 0x0 0x3c300000 0x0 0x1d00000>;
+ <0x02000000 0x0 0x40000000 0x5 0x10000000 0x0 0x10000000>,
+ <0x03000000 0x5 0x20000000 0x5 0x20000000 0x0 0xe0000000>;
bus-range = <0x00 0xff>;
dma-coherent;
--
2.56.0
next prev parent reply other threads:[~2026-10-29 9:45 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-29 9:44 [PATCH v3 0/4] arm64: dts: qcom: Add support for Radxa Dragon Q8B Xilin Wu
2026-10-29 9:44 ` Xilin Wu [this message]
2026-10-29 9:44 ` [PATCH v3 2/4] dt-bindings: arm: qcom: document " Xilin Wu
2026-10-29 9:44 ` [PATCH v3 3/4] arm64: dts: qcom: sc8280xp: add " Xilin Wu
2026-10-29 9:44 ` [PATCH v3 4/4] firmware: qcom: scm: Allow QSEECOM for " Xilin Wu
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