From: Jiale Yao <yaojiale02@163.com>
To: Sunil V L <sunilvl@ventanamicro.com>,
"Rafael J. Wysocki" <rafael@kernel.org>,
Len Brown <lenb@kernel.org>, Paul Walmsley <pjw@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>,
linux-acpi@vger.kernel.org, linux-riscv@lists.infradead.org,
linux-kernel@vger.kernel.org
Cc: stable@vger.kernel.org
Subject: [PATCH v2 08/20] ACPI: riscv: validate interrupt controller MADT entries
Date: Thu, 29 Oct 2026 11:52:39 +0800 [thread overview]
Message-ID: <20261029035253.2333852-9-yaojiale02@163.com> (raw)
In-Reply-To: <20261029035253.2333852-1-yaojiale02@163.com>
The PLIC and APLIC MADT callbacks cast generic subtable headers to
fixed-size records before checking that the complete records are
present. Truncated firmware entries can therefore cause out-of-bounds
field reads.
Reject entries that do not contain the complete controller-specific
structure before registering an interrupt controller.
Fixes: e77b8dc02a1c ("ACPI: RISC-V: Initialize GSI mapping structures")
Cc: stable@vger.kernel.org
Signed-off-by: Jiale Yao <yaojiale02@163.com>
---
drivers/acpi/riscv/irq.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/acpi/riscv/irq.c b/drivers/acpi/riscv/irq.c
index da2c42e0ebfd..1f6fee5c5746 100644
--- a/drivers/acpi/riscv/irq.c
+++ b/drivers/acpi/riscv/irq.c
@@ -220,6 +220,9 @@ static int __init riscv_acpi_aplic_parse_madt(union acpi_subtable_headers *heade
{
struct acpi_madt_aplic *aplic = (struct acpi_madt_aplic *)header;
+ if (BAD_MADT_ENTRY(aplic, end))
+ return -EINVAL;
+
return riscv_acpi_register_ext_intc(aplic->gsi_base, aplic->num_sources, aplic->num_idcs,
aplic->id, ACPI_RISCV_IRQCHIP_APLIC);
}
@@ -229,6 +232,9 @@ static int __init riscv_acpi_plic_parse_madt(union acpi_subtable_headers *header
{
struct acpi_madt_plic *plic = (struct acpi_madt_plic *)header;
+ if (BAD_MADT_ENTRY(plic, end))
+ return -EINVAL;
+
return riscv_acpi_register_ext_intc(plic->gsi_base, plic->num_irqs, 0,
plic->id, ACPI_RISCV_IRQCHIP_PLIC);
}
--
2.34.1
next prev parent reply other threads:[~2026-10-29 3:53 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-29 3:52 [PATCH v2 00/20] ACPI/irqchip: validate MADT entries before use Jiale Yao
2026-10-29 3:52 ` [PATCH v2 01/20] ACPI: irqchip: validate MADT entry bounds before probing Jiale Yao
2026-11-03 14:44 ` Lorenzo Pieralisi
2026-11-03 16:56 ` Rafael J. Wysocki (Intel)
2026-10-29 3:52 ` [PATCH v2 02/20] irqchip/gic-v3-its: validate MADT ITS entries Jiale Yao
2026-10-29 3:52 ` [PATCH v2 03/20] irqchip/gic-v3: validate MADT records before use Jiale Yao
2026-10-29 3:52 ` [PATCH v2 04/20] irqchip/gic-v5-its: validate MADT translate frames Jiale Yao
2026-10-29 3:52 ` [PATCH v2 05/20] irqchip/loongarch-cpu: validate MADT LIO-PIC entries Jiale Yao
2026-10-29 3:52 ` [PATCH v2 06/20] irqchip/loongson-eiointc: validate MADT BIO-PIC entries Jiale Yao
2026-10-29 3:52 ` [PATCH v2 07/20] riscv: validate RINTC entries before use Jiale Yao
2026-10-29 3:52 ` Jiale Yao [this message]
2026-10-29 3:52 ` [PATCH v2 09/20] riscv: acpi: " Jiale Yao
2026-10-29 3:52 ` [PATCH v2 10/20] irqchip/gic-v5-irs: validate MADT GICC entries Jiale Yao
2026-11-02 14:23 ` [PATCH v2 00/20] ACPI/irqchip: validate MADT entries before use Huacai Chen
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