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The node is introduced with all required registers, clocks, clock-names, firmware reference and mailbox connections, but its status is set to “disabled”. This prepares the SoC for HiFi4 DSP support while leaving the node inactive until a platform explicitly enables it. Signed-off-by: Shengjiu Wang --- arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 23 ++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi index ac8293f81c6b..fd2c6b9d3c87 100644 --- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi @@ -8,6 +8,7 @@ #include #include #include +#include #include #include "imx8ulp-pinfunc.h" @@ -208,6 +209,28 @@ soc: soc@0 { ranges = <0x0 0x0 0x0 0x40000000>, <0x60000000 0x0 0x60000000 0x1000000>; + dsp: dsp@21170000 { + compatible = "fsl,imx8ulp-hifi4"; + reg = <0x21170000 0x20000>; + clocks = <&cgc2 IMX8ULP_CLK_LPAV_BUS_DIV>, + <&cgc2 IMX8ULP_CLK_HIFI_DIVPLAT>, + <&cgc2 IMX8ULP_CLK_HIFI_DIVCORE>, + <&cgc1 IMX8ULP_CLK_DUMMY>, + <&pcc5 IMX8ULP_CLK_MU3_B>; + clock-names = "ipg", "ocram", "core", "debug", "mu"; + firmware-name = "imx/dsp/hifi4.bin"; + mboxes = <&mu3 0 0>, + <&mu3 1 0>, + <&mu3 3 0>; + mbox-names = "tx", "rx", "rxdb"; + power-domains = <&scmi_devpd IMX8ULP_PD_HIFI4>; + resets = <&sim_lpav IMX8ULP_SIM_LPAV_HIFI4_DSP_STALL>, + <&sim_lpav IMX8ULP_SIM_LPAV_HIFI4_DSP_RST>, + <&sim_lpav IMX8ULP_SIM_LPAV_HIFI4_DSP_DBG_RST>; + reset-names = "runstall", "softreset", "dbgreset"; + status = "disabled"; + }; + s4muap: mailbox@27020000 { compatible = "fsl,imx8ulp-mu-s4"; reg = <0x27020000 0x10000>; -- 2.34.1